laptop-kernel/drivers/gpu/drm/amd/include, branch master

drm/amdgpu: Add additional DCE6 SCL registers

2025-10-19T14:37:12Z

[ Upstream commit 507296328b36ffd00ec1f4fde5b8acafb7222ec7 ] Fixes: 102b2f587ac8 ("drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init (v2)") Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amdgpu: Enable MES lr_compute_wa by default

2025-10-12T11:01:54Z

commit 1fb710793ce2619223adffaf981b1ff13cd48f17 upstream. The MES set resources packet has an optional bit 'lr_compute_wa' which can be used for preventing MES hangs on long compute jobs. Set this bit by default. Co-developed-by: Yifan Zhang Signed-off-by: Yifan Zhang Acked-by: Alex Deucher Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amd/pm: Add support to set min ISP clocks

2025-06-24T14:02:44Z

Add support to set ISP clocks for SMU v14.0.0. ISP driver uses amdgpu_dpm_set_soft_freq_range() API to set clocks via SMU interface than communicating with PMFW directly. amdgpu_dpm_set_soft_freq_range() is updated to take in any pp_clock_type than limiting to support only PP_SCLK to allow ISP and other driver modules to set the min/max clocks. Any clock specific restrictions are expected to be taken care in SOC specific SMU implementations instead of generic amdgpu_dpm and amdgpu_smu interfaces. Reviewed-by: Xiaojian Du Reviewed-by: Lijo Lazar Reviewed-by: Mario Limonciello Signed-off-by: Pratap Nirujogi Signed-off-by: Alex Deucher

drm/amd: Add missing kdoc for amd_ip_funcs `complete` callback

2025-06-24T14:00:07Z

The `complete` callback should be described in kernel doc. Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/linux-next/20250619205931.41cf9332@canb.auug.org.au/ Reviewed-by: Alex Deucher Link: https://lore.kernel.org/r/20250620041420.3585005-1-superm1@kernel.org Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher

drm/amd: Add support for a complete pmops action

2025-06-18T16:19:18Z

complete() callbacks are supposed to handle reversing anything that occurred during prepare() callbacks. They'll be called on every power state transition, and will also be called if the sequence is failed (such as an aborted suspend). Add support for IP blocks to support this action. Reviewed-by: Alex Hung Link: https://lore.kernel.org/r/20250602014432.3538345-2-superm1@kernel.org Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher

drm/amdgpu: Add userq fence support to SDMAv7.0

2025-06-03T19:32:50Z

- Add userq fence support to SDMAv7.0. - GFX12's user fence irq src id differs from GFX11's, hence we need create a new irq srcid header file for GFX12. User fence irq src id information- GFX11 and SDMA6.0 - 0x43 GFX12 and SDMA7.0 - 0x46 Signed-off-by: Arunpravin Paneer Selvam Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Add userq fence support to SDMAv6.0

2025-05-29T14:56:58Z

Add userq fence support to SDMAv6.0 Signed-off-by: Arunpravin Paneer Selvam Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amd/display: Reuse Subvp debug option for FAMS

2025-05-29T14:54:56Z

FAMS is the successor to SubVP starting with DCN4x. Reuse the same debug option to disable FAMS for debugging purposes. Signed-off-by: Aurabindo Pillai Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Add some missing register headers for DCN401

2025-05-28T20:01:50Z

Add some HDCP related register headers for future use. Signed-off-by: Aurabindo Pillai Reviewed-by: Leo Li Signed-off-by: Alex Deucher

drm/amdgpu: Add jpeg poison status reg

2025-05-22T16:02:49Z

added registers to enable jpeg ras Signed-off-by: Mangesh Gadre Reviewed-by: Stanley.Yang Reviewed-by: Tao Zhou Signed-off-by: Alex Deucher