<feed xmlns='http://www.w3.org/2005/Atom'>
<title>laptop-kernel/drivers/pci/controller/dwc, branch master</title>
<subtitle>Linux kernel tree for laptop</subtitle>
<id>https://git.zx2c4.com/laptop-kernel/atom/drivers/pci/controller/dwc?h=master</id>
<link rel='self' href='https://git.zx2c4.com/laptop-kernel/atom/drivers/pci/controller/dwc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/'/>
<updated>2026-10-14T22:50:48Z</updated>
<entry>
<title>Merge tag 'pci-v7.3-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci</title>
<updated>2026-10-14T22:50:48Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-10-14T22:50:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=e177c722b3dd9ad432195b5c2cbbfe58c909a821'/>
<id>urn:sha1:e177c722b3dd9ad432195b5c2cbbfe58c909a821</id>
<content type='text'>
Pull PCI fixes from Bjorn Helgaas:

 - Leave ANFE masked on Apple T2 Secure Enclave, which fixes spontaneous
   poweroff regressions on MacBookPro16,1 and likely other models with
   the T2 caused by new Advisory Non-Fatal Error support (Jason Perlow)

 - Move dw-rockchip INTx IRQ setup from rockchip_pcie_host_init(), where
   it runs after every reset, to the rockchip_pcie_probe() path to avoid
   installing new IRQ handler (which causes INTx IRQs to be lost) and
   leaking an IRQ domain on every reset; fixes a regression added this
   cycle (Shawn Lin)

* tag 'pci-v7.3-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
  PCI: dw-rockchip: Move INTx IRQ setup to probe
  PCI/AER: Keep ANFE masked on Apple T2 Secure Enclave
</content>
</entry>
<entry>
<title>PCI: dw-rockchip: Move INTx IRQ setup to probe</title>
<updated>2026-10-12T22:01:54Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2026-09-24T04:06:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=4e9f69d08253471d92bcc46b363fbada06bd59c4'/>
<id>urn:sha1:4e9f69d08253471d92bcc46b363fbada06bd59c4</id>
<content type='text'>
Since commit b376b3ff9cb0 ("PCI: dw-rockchip: Implement .reset_root_port()
and use for link down"), .reset_root_port() re-runs the host ops .init()
callback to reprogram the Root Complex after a controller reset. That
works for the register programming, but .init() is not re-entrant: it
also creates the INTx IRQ domain and installs the chained INTx handler.
Every Root Port reset therefore ends up with a second IRQ domain
registered for the same fwnode: the previous one is leaked, as it is
never removed, and worse, the INTx virqs of the downstream PCI devices
were allocated in the previous IRQ domain and are never re-mapped, while
the chained handler now looks up virqs in the new, empty domain. After a
link down recovery, INTx interrupts are silently lost.

Fix it by moving the of_irq_get_byname() lookup, the INTx IRQ domain
creation and the chained handler installation out of .init() and into
rockchip_pcie_configure_rc(), just before dw_pcie_host_init(). The
lookup has to happen before the host is initialized, because
dw_pcie_host_init() enumerates the bus and probes the downstream
devices, and pci_assign_irq() maps their INTx interrupts at that point:
if the domain does not exist yet, the mapping fails and the devices end
up without a usable INTx. This also mirrors how the qcom driver requests
its global IRQ, and leaves .init() with nothing but idempotent register
programming, so both .reset_root_port() and dw_pcie_resume_noirq() can
safely re-run it. Re-running of_irq_get_byname() on every resume is also
gone.

Fixes: b376b3ff9cb0 ("PCI: dw-rockchip: Implement .reset_root_port() and use for link down")
Suggested-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Tested-by: Diederik de Haas &lt;diederik@cknow-tech.com&gt;  # NanoPC-T6 Plus
Reviewed-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Link: https://patch.msgid.link/1790222793-77182-1-git-send-email-shawn.lin@rock-chips.com
</content>
</entry>
<entry>
<title>PCI: imx6: Move clock enable after core reset assertion</title>
<updated>2026-09-17T21:54:34Z</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2026-08-13T09:50:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=c9dc7d730319ad64b51570c5387f1fee7b07b510'/>
<id>urn:sha1:c9dc7d730319ad64b51570c5387f1fee7b07b510</id>
<content type='text'>
Commit 610fa91d9863 ("PCI: imx6: Assert PERST# before enabling regulators")
inadvertently moved clock enablement before core reset assertion, breaking
PCI device initialization on i.MX6Q Apalis platforms with
ASM1061/ASM1062 SATA controllers connected:

  imx6q-pcie 1ffc000.pcie: host bridge /soc/pcie@1ffc000 ranges:
  imx6q-pcie 1ffc000.pcie:       IO 0x0001f80000..0x0001f8ffff -&gt; 0x0000000000
  imx6q-pcie 1ffc000.pcie:      MEM 0x0001000000..0x0001efffff -&gt; 0x0001000000
  imx6q-pcie 1ffc000.pcie: config reg[1] 0x01f00000 == cpu 0x01f00000
  imx6q-pcie 1ffc000.pcie: iATU: unroll F, 4 ob, 4 ib, align 64K, limit 4G
  imx6q-pcie 1ffc000.pcie: Link: Only Gen1 is enabled
  imx6q-pcie 1ffc000.pcie: Link failed to come up. LTSSM: POLL_CONFIG
  imx6q-pcie 1ffc000.pcie: probe with driver imx6q-pcie failed with error -110

NOTE: It is not 100% clear if the issue is specific to the ASM1061/ASM1062
device or on the specific power-up sequence (reset vs cold-power-on).

To fix this regression, restore the original sequence where clocks are
enabled after asserting core reset and configuring the controller type.

Fixes: 610fa91d9863 ("PCI: imx6: Assert PERST# before enabling regulators")
Reported-by: Leonardo Costa &lt;leoreis.costa@gmail.com&gt;
Closes: https://lore.kernel.org/all/bl7i3obu2clzsgeoct2a4mtfhv6typcjdqmgneropf3hpgwve6@n2m5uhlduw57/T/#u
Reported-by: Franz Schnyder &lt;fra.schnyder@gmail.com&gt;
Closes: https://lore.kernel.org/all/t65y5d54axtksbfs7r4olcefqhwm6m4dz3njgnrnf7fcotj74i@o7avoznlafbj/
Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
[bhelgaas: move to pci/for-linus for v7.3]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: stable@vger.kernel.org # 7.2+
Link: https://patch.msgid.link/20260813095003.356062-1-hongxing.zhu@oss.nxp.com
</content>
</entry>
<entry>
<title>Merge tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci</title>
<updated>2026-08-23T19:44:10Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-23T19:44:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=570f7e331f5febb30f1384817463c7e42b65ca7d'/>
<id>urn:sha1:570f7e331f5febb30f1384817463c7e42b65ca7d</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "Resource management:

   - Add hotplug reservation only once (not at each level of the
     hierarchy) so bridge windows don't grow more than necessary (Ilpo
     Järvinen)

  Driver binding:

   - Rework device matching so device ID lifetime only needs to cover
     the probe path since dynamic IDs can be removed at any time (Gary
     Guo)

  Error handling:

   - Update mappings of AER errors to agent &amp; layer and log them for
     each individual error when multiple errors detected (Lukas Wunner)

   - Log Error Source only once, not twice in separate messages (Lukas
     Wunner)

   - Emit TLP Log only for unmasked errors (Lukas Wunner)

   - Support Advisory Non-Fatal Errors (Lukas Wunner)

   - Allow DPC on all Downstream Ports, not just Root Ports, when OS
     controls AER (Darshit Shah)

  ASPM:

   - Program the same ASPM Control values for every function of
     multi-function devices, as recommended by the PCIe spec (Krishna
     Chaitanya Chundru)

   - Avoid L0s for Realtek RTS525A, where it causes an AER interrupt
     storm (Max Lee)

   - Avoid ASPM L0s, L1, and L1 PM Substates based on 'aspm-no-l0s',
     'aspm-no-l1' [1], and 'aspm-no-l1ss' DT properties (Krishna
     Chaitanya Chundru)

  Power management:

   - Allow D3 for native hotplug-capable Root Ports on non-x86 platforms
     (we avoid D3 for these ports on x86 because some old platforms
     didn't validate it) (Manivannan Sadhasivam)

   - Allow portdrv to claim Ports even if they don't support services
     (AER, PME, DPC, hotplug, etc) so it can do power management (Brian
     Norris)

  Power control:

   - Add support for PCIe WAKE# interrupt when described via DT (Krishna
     Chaitanya Chundru)

   - For the TC9563 PCIe switch:

       - Take a reference on the I2C adapter to avoid uninterruptible
         hang when unloading an I2C module while in-use (Johan Hovold)

       - Update DT binding and driver to restrict Tx Amplitude, DFE and
         N_FTS to USP, DSP1 and DSP2 (Manivannan Sadhasivam)

       - Power off only external-facing ports (DSP1, DSP2), leaving USP
         and DSP3 (aka VDSP) powered up (Manivannan Sadhasivam)

       - Move integrated MAC Endpoint out of the list of internal ports
         and configure it separately (Manivannan Sadhasivam)

  Virtualization:

   - Add ACS quirk for Pericom PI7C9X2G608 switches (Tim Harvey)

   - Fix a long-standing bug in the Intel PCH Root Port MPC ACS quirk
     that didn't update the intended INTEL_MPC_REG_IRBNCE bit because it
     used a 16-bit config write when a 32-bit write was intended
     (Mohamad Raizudeen)

  Procfs:

   - Avoid spurious runtime PM wakeup on config space accesses that are
     outside config space and fail before reaching PCI (Krzysztof
     Wilczyński)

   - Warn on user-space writes to kernel-exclusive config space regions,
     as we already do for sysfs (Krzysztof Wilczyński)

   - Check credentials of opener, not reader, for config space reads, as
     we already do for sysfs (Krzysztof Wilczyński)

  Sysfs:

   - In pci_write_legacy_io(), avoid out-of-bounds reads from the user
     buffer and fix incorrect ioport write data (1-byte writes on
     little-endian powerpc, 2- and 4-byte writes on big-endian powerpc)
     (Krzysztof Wilczyński)

   - In pci_read_legacy_io(), fix incorrect ioport read data for 2- and
     4-byte reads on big-endian powerpc (Krzysztof Wilczyński)

   - Fix I/O port accessor argument order in Alpha pci_legacy_write()
     (Krzysztof Wilczyński)

   - Avoid spurious runtime PM wakeup on config space accesses that are
     outside config space and fail before reaching PCI (Krzysztof
     Wilczyński)

   - Return -EINVAL, not -ENODEV, for mmap of I/O BAR that fails because
     the arch doesn't support it, as we do for procfs (Krzysztof
     Wilczyński)

   - Check for LOCKDOWN_PCI_ACCESS for legacy_io and legacy_mem, as we
     do for other config space accessors (Krzysztof Wilczyński)

  Peer-to-peer DMA:

   - Add Nvidia Vera Rubin to list of platforms that support P2PDMA
     (Leon Romanovsky)

  Endpoint framework:

   - Check doorbell SUCCESS bit in pci_endpoint_test to avoid treating
     some failures as successes (Niklas Cassel)

   - Fail doorbell test when the trigger IRQ is missed (Niklas Cassel)

  New native PCIe controller drivers:

   - Add DT binding and driver for NVIDIA Tegra264 (Thierry Reding)

  Native PCIe controllers:

   - Use common wait time definitions for PCIe link monitoring instead
     of defining driver-private duplicates (Thierry Reding)

  Generic host bridge driver:

   - Fix NULL pointer dereference that caused enumeration failures on
     32-bit CAM systems (Steffen Persvold)

  Amlogic Meson PCIe controller driver:

   - Correct the PERST# GPIO state so it remains asserted until power
     and REFCLK become stable to fix enumeration failure (Ronald
     Claveau)

  ASPEED PCIe controller driver:

   - Switch to irq_domain_create_linear() so we can obsolete
     irq_domain_add_linear() (Jiri Slaby)

  Cadence PCIe controller driver:

   - Add MODULE_DEVICE_TABLE to generate module aliases for OF-based
     module autoloading (Pengpeng Hou)

   - Add debugfs 'ltssm_status' file for LGA- and HPA-based Cadence
     controllers (Hans Zhang)

   - Support up to x4 (not x2) lanes for J200 (Takuma Fujiwara)

   - Fix host/endpoint dependencies for cadence-plat driver to fix link
     error when cadence-plat is built-in but the host or endpoint driver
     is modular (Aksh Garg)

  Freescale i.MX6 PCIe controller driver:

   - Add imx6 intr/aer/pme interrupt lines for i.MX95 (Richard Zhu)

   - Remove PERST# checking from pci_host_common_parse_port() so callers
     can decide whether to fall back to legacy DT binding with PERST# in
     the host bridge (Sherry Sun)

   - Fix build issues when PCI_PWRCTRL_GENERIC or PCI_HOST_COMMON is a
     module (Arnd Bergmann)

   - Create pwrctrl devices only once by doing it from imx_pcie_probe()
     instead of imx_pcie_host_init(), which is used during both probe
     and resume (Sherry Sun)

   - Use 'dw_pcie_rp-&gt;skip_pwrctrl_off' to avoid powering off devices
     during suspend to preserve wakeup capability (Sherry Sun)

   - Add runtime PM support for i.MX95 to allow dynamic power management
     when the link is idle (Richard Zhu)

  Intel VMD host bridge driver:

   - Support device ID 0x28C1 and assume that BIOS has already
     enumerated the hierarchy below VMD and stored bus range info for OS
     to use (Nirmal Patel)

   - Add support for VMCONFIG BUS_RESTRICT_CFG=3, which makes it
     possible to enumerate downstream devices on Intel Arrow Lake-HX
     systems and probably others (Ali Alaei)

   - Pay attention to _OSC negotiation for VMD hierarchy only when
     running on bare metal, not when running in a VM (Nirmal Patel)

   - Add Nova Lake (NVL) and Dunlow (DNL) Device IDs (Szymon Durawa)

  MediaTek PCIe controller driver:

   - Add support for PCIe controller in EcoNet EN7528 and EN751221 SoCs
     (Caleb James DeLisle)

  MediaTek PCIe Gen3 controller driver:

   - Add mediatek-gen3 'memory-region' for restricted DMA buffer
     (Chen-Yu Tsai)

  NVIDIA Tegra264 PCIe controller driver:

   - Distinguish Tegra264 C0 PCIe controller for internal GPU from C1-C5
     controllers so the unit address matches the first 'reg' entry
     (Thierry Reding)

   - Add Tegra264 Root Port stanzas to prepare for generic WAKE#
     handling (Thierry Reding)

  Qualcomm PCIe controller driver:

   - Add IPQ9650 compatible with global interrupt (Kathiravan
     Thirumoorthy)

   - Add IPQ5210 compatible with IPQ9574 fallback (Varadarajan
     Narayanan)

   - Add DT binding and driver support for Hawi SoC (Matthew Leung)

   - Skip PERST# GPIOs provided by downstream PCIe devices, which should
     be handled by drivers of those devices (Manivannan Sadhasivam)

   - Stop advertising Attention Button Present (no Qcom SoCs support
     Attention Buttons) so pciehp can use Presence Detect Changed events
     (Qiang Yu)

  Renesas R-Car PCIe controller driver:

   - Add rcar-gen4-pci-host optional 'msi-parent' for GIT ITS (Marek
     Vasut)

   - When MSI is enabled but iMSI-RX is not used, configure AXIINTC to
     allow GIT ITS to handle MSI (Marek Vasut)

   - Refactor GIC600 implementation to make it easier to add platforms
     that only support 32-bit addressing (Marek Vasut)

   - Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600
     integrations that only support 32-bit addressing (Marek Vasut)

  Renesas RZ/G3S PCIe controller driver:

   - Add DT binding and driver support for RZ/V2H(P) SoC, which contains
     two PCIe controllers, configured either as a single x4 link or two
     independent x2 link controllers (Lad Prabhakar)

  SpacemiT K1 PCIe controller driver:

   - Add missing MODULE_DEVICE_TABLE() to generate module alias info for
     OF-based module autoloading (Pengpeng Hou)

  StarFive PCIe controller driver:

   - Fix resource leaks on error paths in host_init() (Ali Tariq)

   - Fix runtime PM handling and teardown ordering to avoid register
     access while power or clocks are disabled (Ali Tariq)

   - Check for runtime PM resume failure to avoid register access while
     power or clocks are disabled (Ali Tariq)

  Synopsys DesignWare PCIe controller driver:

   - Add LECARC PMU IDs to the DWC RAS/DES VSEC list so it can take
     advantage of the existing debugfs support for silicon debug, error
     injection, and event counters (Brett Zhou)

   - Factor pcie_valid_speed() and pci_bus_speed2lnkctl2() out of bwctrl
     so they can be shared by the DWC core (Hans Zhang)

   - Flush MSI writes from endpoint before unmapping the iATU, as we
     already do for MSI-X writes (Niklas Cassel)

   - Unmap MSI iATU window before mapping MSI-X window, to avoid a
     subsequent MSI write using a disabled aperture and losing the
     interrupt (Niklas Cassel)

   - Change endpoint .pre_init() and .init() callbacks to return errors
     and handle them (Marek Vasut)

  UltraRISC PCIe controller driver:

   - Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them
     in the driver (Jia Wang)

   - Use module_platform_driver() since this may be built as a module,
     though not removable because IRQs can't be safely disposed (Jia
     Wang)

  MicroSemi Switchtec management driver:

   - Add Microchip PCI1008 device ID and include it in NTB DMA alias
     quirk (Logan Gunthorpe)

  Miscellaneous:

   - Document how to write PCI Host Controller drivers (Manivannan
     Sadhasivam)

   - Fix typos in documentation (D'Orus Tsitera)

   - Use %pe format specifier to print error pointers so we get symbolic
     errname when available (Krzysztof Wilczyński)"

* tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (124 commits)
  PCI: vmd: Add Nova Lake (NVL) and Dunlow (DNL) Device IDs
  PCI: tegra264: Add Tegra264 support
  dt-bindings: PCI: tegra264: Switch to PCIe Root Port bindings
  dt-bindings: PCI: tegra264: Strictly distinguish C0 from C1-C5
  PCI/AER: Support Advisory Non-Fatal Errors
  PCI: Fix 32-bit config write in Intel PCH Root Port MPC ACS quirk
  PCI: dwc: Handle return value from endpoint .pre_init callback
  PCI: dwc: Handle return value from endpoint .init callback
  PCI: dwc: Add PCI ID for LECARC PCIe PMU
  PCI/ASPM: Mask ASPM states based on Devicetree properties
  PCI/ASPM: Disable/restore ASPM on every function for multi-function devices
  Documentation: PCI: Document how to write PCI Host Controller drivers
  PCI/ASPM: Use pcie_capability_clear_and_set_word() for ASPM disable/restore
  PCI: Add support for PCIe WAKE# interrupt
  PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms
  dt-bindings: PCI: Correct white-space style
  PCI/ASPM: Avoid L0s for Realtek RTS525A
  PCI: ultrarisc: Use module_platform_driver()
  PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks
  dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks
  ...
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2026-08-21T21:40:48Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=9324becc398a1f9e67c91a3d652a7c56e5afc7f4'/>
<id>urn:sha1:9324becc398a1f9e67c91a3d652a7c56e5afc7f4</id>
<content type='text'>
- Fix typos in documentation (D'Orus Tsitera)

- Use %pe format specifier to print error pointers so we get symbolic
  errname when available (Krzysztof Wilczyński)

* pci/misc:
  PCI: Use %pe format specifier to print error pointers
  Documentation: PCI: Fix sysfs-bus-pci typo
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-ultrarisc'</title>
<updated>2026-08-21T21:40:44Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=3d3fce9435088be669e4473425877259e1cabac3'/>
<id>urn:sha1:3d3fce9435088be669e4473425877259e1cabac3</id>
<content type='text'>
- Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them in the
  driver (Jia Wang)

- Use module_platform_driver() since this may be built as a module, though
  not removable because IRQs can't be safely disposed (Jia Wang)

* pci/controller/dwc-ultrarisc:
  PCI: ultrarisc: Use module_platform_driver()
  PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks
  dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-spacemit-k1'</title>
<updated>2026-08-21T21:40:44Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=2a66fae91e356ae0713f7e7fd3caddd089ac2c46'/>
<id>urn:sha1:2a66fae91e356ae0713f7e7fd3caddd089ac2c46</id>
<content type='text'>
- Add missing MODULE_DEVICE_TABLE() to generate module alias info for
  OF-based module autoloading (Pengpeng Hou)

* pci/controller/dwc-spacemit-k1:
  PCI: spacemit: Add missing MODULE_DEVICE_TABLE()
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-rcar-gen4'</title>
<updated>2026-08-21T21:40:43Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=45b3d1baf4d6062ea61c23b0c60eb6e4720e4936'/>
<id>urn:sha1:45b3d1baf4d6062ea61c23b0c60eb6e4720e4936</id>
<content type='text'>
- When MSI is enabled but iMSI-RX is not used, configure AXIINTC to allow
  GIT ITS to handle MSI (Marek Vasut)

- Refactor GIC600 implementation to make it easier to add platforms that
  only support 32-bit addressing (Marek Vasut)

- Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600 integrations that
  only support 32-bit addressing (Marek Vasut)

* pci/controller/dwc-rcar-gen4:
  irqchip/gic-v3: Add Renesas R-Car Gen4 erratum workaround
  irqchip/gic-v3: Refactor GIC600 limited to 32bit PA erratum handling
  PCI: rcar-gen4: Configure AXIINTC if iMSI-RX is not used
  PCI: dwc: Move iMSI-RX check before calling 'pp-&gt;ops-&gt;init()'
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-qcom'</title>
<updated>2026-08-21T21:40:43Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=1579362594999e8357ac671ecc45775740714da9'/>
<id>urn:sha1:1579362594999e8357ac671ecc45775740714da9</id>
<content type='text'>
- Add DT binding and driver support for Hawi SoC (Matthew Leung)

- Skip PERST# GPIOs provided by downstream PCIe devices, which should be
  handled by drivers of those devices (Manivannan Sadhasivam)

- Stop advertising Attention Button Present (no Qcom SoCs support Attention
  Buttons) so pciehp can use Presence Detect Changed events (Qiang Yu)

* pci/controller/dwc-qcom:
  PCI: qcom: Clear Attention Button Present in Slot Capabilities
  PCI: qcom: Rename qcom_pcie_set_slot_nccs() to qcom_pcie_set_slot_cap()
  PCI: qcom: Skip PERST# GPIOs provided by downstream PCIe devices
  PCI: qcom: Add support for Hawi
  dt-bindings: PCI: qcom: Document Hawi and Maili PCIe Controllers
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-meson'</title>
<updated>2026-08-21T21:40:42Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2026-08-21T21:40:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/laptop-kernel/commit/?id=9bb52aa1972d895b1bbd31aed5813c39ddc33a18'/>
<id>urn:sha1:9bb52aa1972d895b1bbd31aed5813c39ddc33a18</id>
<content type='text'>
- Correct the PERST# GPIO state so it remains asserted until power and
  REFCLK become stable to fix enumeration failure (Ronald Claveau)

* pci/controller/dwc-meson:
  PCI: meson: Fix GPIO state while requesting PERST#
</content>
</entry>
</feed>
