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<title>linux-dev/Documentation/arm/sunxi, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/arm/sunxi?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/Documentation/arm/sunxi?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2019-07-15T12:20:24Z</updated>
<entry>
<title>docs: arm: convert docs to ReST and rename to *.rst</title>
<updated>2019-07-15T12:20:24Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab+samsung@kernel.org</email>
</author>
<published>2019-04-14T18:51:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dc7a12bdfccd94c31f79e294f16f7549bd411b49'/>
<id>urn:sha1:dc7a12bdfccd94c31f79e294f16f7549bd411b49</id>
<content type='text'>
Converts ARM the text files to ReST, preparing them to be an
architecture book.

The conversion is actually:
  - add blank lines and identation in order to identify paragraphs;
  - fix tables markups;
  - add some lists markups;
  - mark literal blocks;
  - adjust title markups.

At its new index.rst, let's add a :orphan: while this is not linked to
the main index.rst file, in order to avoid build warnings.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
Reviewed-by Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt; # For sun4i-ss
</content>
</entry>
<entry>
<title>ARM: sunxi: add support for R40 SoC</title>
<updated>2017-09-22T19:57:09Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.io</email>
</author>
<published>2017-08-22T05:23:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=14e25a03682f7ca0464ac7e3f3f10f02d885fed4'/>
<id>urn:sha1:14e25a03682f7ca0464ac7e3f3f10f02d885fed4</id>
<content type='text'>
Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals
like A20.

Add support for it.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>ARM: sunxi: fix the core number of V3s in sunxi README</title>
<updated>2017-09-22T19:56:48Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.io</email>
</author>
<published>2017-08-22T05:23:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9e8dda2df7cc209d0165618e6d18b324c02c8348'/>
<id>urn:sha1:9e8dda2df7cc209d0165618e6d18b324c02c8348</id>
<content type='text'>
The Allwinner V3s SoC is not quad-core, but single-core.

Fix this in the README file.

Fixes: b074fede01c0 ("arm: sunxi: add support for V3s SoC")
Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arm: sunxi: add support for V3s SoC</title>
<updated>2017-01-20T20:31:34Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.xyz</email>
</author>
<published>2017-01-19T17:54:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b074fede01c0be4a45a7883620f40ff88c61488a'/>
<id>urn:sha1:b074fede01c0be4a45a7883620f40ff88c61488a</id>
<content type='text'>
Allwinner V3s is a low-end single-core Cortex-A7 SoC, with 64MB
integrated DRAM, and several peripherals.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.xyz&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>ARM: sunxi: add support for H2+ SoC</title>
<updated>2017-01-02T21:25:32Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.xyz</email>
</author>
<published>2016-12-02T15:05:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=16fa9629c4eac40083899d904057df993a2eb06e'/>
<id>urn:sha1:16fa9629c4eac40083899d904057df993a2eb06e</id>
<content type='text'>
Allwinner H2+ is a quad-core Cortex-A7 SoC.

It is very like H3, that they share the same SoC ID (0x1680), and H3
memory maps as well as drivers works well on the SoC.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.xyz&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2016-10-08T04:18:42Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-08T04:18:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=66f2c6d9525baa7534640f09f406cd2987e0f287'/>
<id>urn:sha1:66f2c6d9525baa7534640f09f406cd2987e0f287</id>
<content type='text'>
Pull ARM SoC platform updates from Arnd Bergmann:
 "These are updates for platform specific code on 32-bit ARM machines,
  essentially anything that can not (yet) be expressed using DT files.

  Noteworthy changes include:

   - We get support for running in big-endian mode on two platforms:
     sunxi (Allwinner) and s3c24xx (old Samsung).

   - The recently added Uniphier platform now uses standard PSCI methods
     for SMP booting and we remove support for old bootloader versions
     that did not support it yet.

   - In sunxi, we gain support for the "Nextthing GR8" SoC, which is a
     close relative of the Allwinner A13 and R8 chips.

   - PXA completes its move over to the generic dmaengine framework and
     removes its old private API

   - mach-bcm gains support for BCM47189/BCM53573, their first ARM SoC
     with integrated 802.11ac wireless networking"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: imx legacy: pca100: move peripheral initialization to .init_late
  ARM: imx legacy: mx27ads: move peripheral initialization to .init_late
  ARM: imx legacy: mx21ads: move peripheral initialization to .init_late
  ARM: imx legacy: pcm043: move peripheral initialization to .init_late
  ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late
  ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late
  ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late
  ARM: imx legacy: vpr200: move peripheral initialization to .init_late
  ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late
  ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late
  ARM: imx legacy: qong: move peripheral initialization to .init_late
  ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late
  ARM: imx legacy: pcm037: move peripheral initialization to .init_late
  ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late
  ARM: imx legacy: mx31ads: move peripheral initialization to .init_late
  ARM: imx legacy: mx31lite: move peripheral initialization to .init_late
  ARM: imx legacy: kzm: move peripheral initialization to .init_late
  MAINTAINERS: update list of Oxnas maintainers
  ARM: orion5x: remove extraneous NO_IRQ
  ARM: orion: simplify orion_ge00_switch_init
  ...
</content>
</entry>
<entry>
<title>ARM: sunxi: Support the Nextthing GR8</title>
<updated>2016-09-08T12:32:23Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-09-08T10:26:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c1efda1238be1efa8612e26ee98795298ffd6f95'/>
<id>urn:sha1:c1efda1238be1efa8612e26ee98795298ffd6f95</id>
<content type='text'>
The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family.

It has a number of new controllers compared to the A10s and A13 (SPDIF, I2S),
but some controllers missing too (Ethernet, less I2C, less UARTs).

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>Documentation: sunxi: Update Allwinner SoC documentation</title>
<updated>2016-08-18T17:23:47Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.xyz</email>
</author>
<published>2016-08-13T10:01:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=00445edff345b654a074733d5a41c79d5fe33be3'/>
<id>urn:sha1:00445edff345b654a074733d5a41c79d5fe33be3</id>
<content type='text'>
Now, the A83T and A64 SoC user manuals are available.
Update the documentation to add the links.

An updated version of A83T datasheet is also included now.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.xyz&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Jonathan Corbet &lt;corbet@lwn.net&gt;
</content>
</entry>
<entry>
<title>ARM: sunxi: Introduce Allwinner for A83T support</title>
<updated>2016-02-05T06:54:08Z</updated>
<author>
<name>Vishnu Patekar</name>
<email>vishnupatekar0510@gmail.com</email>
</author>
<published>2016-01-06T13:11:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1425ec0f1ce46c95838c797a721bf9c6e0be14e2'/>
<id>urn:sha1:1425ec0f1ce46c95838c797a721bf9c6e0be14e2</id>
<content type='text'>
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.

Signed-off-by: Vishnu Patekar &lt;vishnupatekar0510@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
[maxime: Removed the clock protection code]
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>ARM: sunxi: Add R8 support</title>
<updated>2015-10-17T16:47:28Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2015-06-09T17:38:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bef6229f36c1c2ddae186f4e328c2359c1dad18d'/>
<id>urn:sha1:bef6229f36c1c2ddae186f4e328c2359c1dad18d</id>
<content type='text'>
The R8 is a new Allwinner SoC based on the A13. While both are very
similar, there's still a few differences. Introduce a new compatible to
deal with them.

In order to have a consistent naming, instead of mentioning the Allwinner
A series as the machine name, switch to sun4i/sun5i like what is done for
the other families.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
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