linux-dev/Documentation/devicetree/bindings/arm/exynos, branch master

dt-bindings: Consolidate SRAM bindings from all vendors

2015-12-09T21:29:37Z

SRAM bindings for various SoCs, using the mmio-sram genalloc API, are spread over different places - per SoC vendor. Since all of these are quite similar (they depend on mmio-sram) move them to a common place. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Cc: Heiko Stuebner Cc: Maxime Ripard Cc: Chen-Yu Tsai Cc: Kukjin Kim Acked-by: Maxime Ripard Acked-by: Heiko Stuebner Signed-off-by: Rob Herring

dt-bindings: Consolidate Exynos SoC bindings

2015-10-23T20:07:02Z

Exynos SoC Device Tree bindings are spread over arm/exynos/ and arm/samsung/ directories. There is no need for that separation and it actually confuses. Put power domain bindings under power/ and remaining samsung-boards.txt under arm/samsung/. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim

dt-bindings: Correct the example for Exynos power domain clocks

2015-10-23T19:31:40Z

Since commit 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off") the "pclkN" names of "clock-names" property is not parsed any more. The bindings and driver were updated but the example was not. Fix the example now. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim

ARM: EXYNOS: Get current parent clock for power domain on/off

2015-06-05T17:17:56Z

Using a fixed (by DTS) parent for clocks when turning on the power domain may introduce issues in other drivers. For example when such driver changes the parent during runtime and expects that he is the only place of such change. Do not rely on DTS providing the fixed parent for such clocks. Instead before switching domain off, grab a current parent of a clock with clk_get_parent(). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim

Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

2015-04-03T21:59:52Z

Merge "Samsung DT updates for v4.1" from Kukjin Kim: - for exynos3250 : add assigned clock parents for CMU nodes - for exynos4412-odroid : add eMMC reset line - for exynos5250 : fixed typo for interrupt-cells - for exynos5250-snow : define stdout-path property : represent bridge and panel connection : enable wifi power-on and add cap-sdio-irq to wifi mmc node - for exynos5250-spring : define stdout-path property - for exynos5420 : fixed typo for interrupt-cells : add async-bridge clocks for gsc and disp1 PDs - for exynos5420 boards : Mux XMMCnDATA[0] pad correctly - for exynos5420-odroidxu3 : add eMMC reset line - for Peach boards : add HS400 support and define stdout-path property : add mclk entry and add WiFi module support : represent bridge and panel connection * tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Fixed typo interrupt-cells for exynos5420 and exynos5250 ARM: dts: Add HS400 support for exynos5420 and exynos5800 ARM: dts: add async-bridge clocks to gsc power domain for exynos5420 ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420 dt-bindings: add asynchronous bridge clock for exynos ARM: dts: Define stdout-path property for exynos5250-spring ARM: dts: Define stdout-path property for exynos5250-snow ARM: dts: Define stdout-path property for Peach boards ARM: dts: Add assigned clock parents to CMU node for exynos3250 ARM: dts: Add mclk entry for Peach boards ARM: dts: Add WiFi module support for Peach boards ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards ARM: dts: add eMMC reset line for exynos5422-odroidxu3 ARM: dts: add eMMC reset line for exynos4412-odroid-common ARM: dts: represent bridge and panel connection for exynos5420-peach-pit ARM: dts: represent bridge and panel connection for exynos5250-snow ARM: dts: Add cap-sdio-irq to wifi mmc node for exynos5250-snow ARM: dts: Enable wifi power-on for exynos5250-snow Signed-off-by: Olof Johansson

dt-bindings: add asynchronous bridge clock for exynos

2015-03-17T17:14:07Z

The patch adds bindings for clocks required by async-bridges present in the particular power domain. Signed-off-by: Andrzej Hajda Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim

ARM: EXYNOS: add support for sub-power domains

2015-02-26T20:26:57Z

This patch adds support for making one power domain a sub-domain of other domain. This is useful for modeling power dependences for devices like TV Mixer or Camera ISP, which needs to have more than one power domain enabled to be operational. Based on previous work by Amit Daniel Kachhap . Signed-off-by: Marek Szyprowski Reviewed-by: Ulf Hansson Signed-off-by: Kukjin Kim

ARM: dts: convert to generic power domain bindings for exynos DT

2015-01-24T04:24:05Z

This patch replaces all custom samsung,power-domain dt properties with generic power domain bindings and updates documentation Samsung's devices referring to old binding. Suggested-by: Kevin Hilman Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas [javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook] Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim

ARM: exynos: Move to generic PM domain DT bindings

2014-09-22T13:57:40Z

This patch moves Exynos PM domain code to use the new generic PM domain look-up framework introduced in previous patches, thus also allowing the new code to be compiled with CONFIG_ARCH_EXYNOS. This patch was originally submitted by Tomasz Figa when he was employed by Samsung. Link: http://marc.info/?l=linux-pm&m=139955336002083&w=2 Signed-off-by: Ulf Hansson Reviewed-by: Kevin Hilman Reviewed-by: Dmitry Torokhov Signed-off-by: Rafael J. Wysocki

ARM: EXYNOS: Add support for clock handling in power domain

2014-07-10T23:03:19Z

While powering on/off a local powerdomain in exynos5 chipsets, the input clocks to each device gets modified. This behaviour is based on the SYSCLK_SYS_PWR_REG registers. E.g. SYSCLK_MFC_SYS_PWR_REG = 0x0, the parent of input clock to MFC (aclk333) gets modified to oscclk = 0x1, no change in clocks. The recommended value of SYSCLK_SYS_PWR_REG before power gating any domain is 0x0. So we must also restore the clocks while powering on a domain everytime. This patch adds the framework for getting the required mux and parent clocks through a power domain device node. With this patch, while powering off a domain, parent is set to oscclk and while powering back on, its re-set to the correct parent which is as per the recommended pd on/off sequence. Signed-off-by: Prathyush K Signed-off-by: Andrew Bresticker Signed-off-by: Arun Kumar K Signed-off-by: Shaik Ameer Basha Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim