<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/Documentation/devicetree/bindings/clock/ti, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/clock/ti?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/clock/ti?h=linus%2Fmaster'/>
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<updated>2022-04-11T13:02:50Z</updated>
<entry>
<title>dt-bindings: clock: ti: Add clock-output-names for TI composite clocks</title>
<updated>2022-04-11T13:02:50Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-02-03T11:23:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fc3d39d5758dc001662df5aac825b2b6bcb6476f'/>
<id>urn:sha1:fc3d39d5758dc001662df5aac825b2b6bcb6476f</id>
<content type='text'>
For the TI composite clocks, we currently have only the divider clock
list clock-output-names as an optional devicetree property. Let's add
clock-output-names for all the TI composite clock bindings.

This allows us to use clock-output-names for the clockctrl instance name
instead of relying on a custom compatible or non-standard node names.

Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Tero Kristo &lt;kristo@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Message-Id: &lt;20220203112337.19821-3-tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add binding for TI clksel</title>
<updated>2022-02-09T22:01:00Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-02-03T07:39:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=31fc1c63c2ae4a542e3c7ac572a10a59ece45c24'/>
<id>urn:sha1:31fc1c63c2ae4a542e3c7ac572a10a59ece45c24</id>
<content type='text'>
In order to prepare for fixing lots of devicetree unique_unit_address
warnings for the TI clock nodes, let's add a binding for the TI clksel
clocks. This allows us to move the overlapping reg properties for the
component clocks to be children of the related clksel nodes. And with
that we need the reg property only for the parent clksel node making
the reg property unique like it should be.

We want to set #clock-cells = &lt;2&gt; in case we ever start parsing ranges
of clkcsel instances directly using a clksel driver rather than using the
existing component clock drivers and child nodes.

And before the devicetree files can be updated, we need to update the
TI clock drivers to get the IO address from the parent clksel node.

Cc: Tero Kristo &lt;kristo@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20220203073929.59296-1-tony@atomide.com
</content>
</entry>
<entry>
<title>dt-bindings: ti: dpll: add spread spectrum support</title>
<updated>2021-06-09T00:49:16Z</updated>
<author>
<name>Dario Binacchi</name>
<email>dariobin@libero.it</email>
</author>
<published>2021-06-06T20:22:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4a8bc2644ef0cbf8ebe46da3887eafd309b0f187'/>
<id>urn:sha1:4a8bc2644ef0cbf8ebe46da3887eafd309b0f187</id>
<content type='text'>
DT bindings for enabling and adjusting spread spectrum clocking have
been added.

Signed-off-by: Dario Binacchi &lt;dariobin@libero.it&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20210606202253.31649-3-dariobin@libero.it
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock</title>
<updated>2020-01-20T07:34:37Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2019-11-14T10:18:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8e28918a85a088362f3450078c5519f27aecdd3a'/>
<id>urn:sha1:8e28918a85a088362f3450078c5519f27aecdd3a</id>
<content type='text'>
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.

Suggested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: power: Convert Generic Power Domain bindings to json-schema</title>
<updated>2019-11-14T16:46:16Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2019-10-30T17:32:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5279a3d8bedea477eaaaddedc3dd5fa62b86cfd7'/>
<id>urn:sha1:5279a3d8bedea477eaaaddedc3dd5fa62b86cfd7</id>
<content type='text'>
Convert Generic Power Domain bindings to DT schema format using
json-schema.

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>docs: Fix more broken references</title>
<updated>2018-06-15T21:11:26Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab+samsung@kernel.org</email>
</author>
<published>2018-05-08T18:14:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=34962fb8070cb5a60b686a5ee11f81f2978836bd'/>
<id>urn:sha1:34962fb8070cb5a60b686a5ee11f81f2978836bd</id>
<content type='text'>
As we move stuff around, some doc references are broken. Fix some of
them via this script:
	./scripts/documentation-file-ref-check --fix

Manually checked that produced results are valid.

Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Acked-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Acked-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Acked-by: Miguel Ojeda &lt;miguel.ojeda.sandonis@gmail.com&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
Acked-by: Jonathan Corbet &lt;corbet@lwn.net&gt;
</content>
</entry>
<entry>
<title>Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next</title>
<updated>2018-04-06T20:22:06Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2018-04-06T20:22:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a83fdfae5a25588cc6c4c086e98f03c7270fc37b'/>
<id>urn:sha1:a83fdfae5a25588cc6c4c086e98f03c7270fc37b</id>
<content type='text'>
* clk-davinci:
  clk: davinci: Remove redundant dev_err calls
  clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks
  clk: davinci: New driver for TI DA8XX CFGCHIP clocks
  dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks
  clk: davinci: Add platform information for TI DM646x PSC
  clk: davinci: Add platform information for TI DM644x PSC
  clk: davinci: Add platform information for TI DM365 PSC
  clk: davinci: Add platform information for TI DM355 PSC
  clk: davinci: Add platform information for TI DA850 PSC
  clk: davinci: Add platform information for TI DA830 PSC
  clk: davinci: New driver for davinci PSC clocks
  dt-bindings: clock: New bindings for TI Davinci PSC
  clk: davinci: Add platform information for TI DM646x PLL
  clk: davinci: Add platform information for TI DM644x PLL
  clk: davinci: Add platform information for TI DM365 PLL
  clk: davinci: Add platform information for TI DM355 PLL
  clk: davinci: Add platform information for TI DA850 PLL
  clk: davinci: Add platform information for TI DA830 PLL
  clk: davinci: New driver for davinci PLL clocks
  dt-bindings: clock: Add new bindings for TI Davinci PLL clocks

* clk-si544:
  clk: Add driver for the si544 clock generator chip

* clk-rockchip:
  clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
  clk: rockchip: Fix error return in phase clock registration
  clk: rockchip: Correct the behaviour of restoring cached phase
  clk: rockchip: Fix wrong parents for MMC phase clock for rk3328
  clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
  clk: rockchip: Add 1.6GHz PLL rate for rk3399
  clk: rockchip: Restore the clock phase after the rate was changed
  clk: rockchip: Prevent calculating mmc phase if clock rate is zero
  clk: rockchip: Free the memory on the error path
  clk: rockchip: document hdmi_phy external input for rk3328
  clk: rockchip: add flags for rk3328 dclk_lcdc
  clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
  clk: rockchip: protect all remaining rk3328 interconnect clocks
  clk: rockchip: export sclk_hdmi_sfc on rk3328
  clk: rockchip: remove HCLK_VIO from rk3328 dt header
  clk: rockchip: fix hclk_vio_niu on rk3328

* clk-uniphier:
  clk: uniphier: add additional ethernet clock lines for Pro4
  clk: uniphier: add SATA clock control support
  clk: uniphier: add PCIe clock control support
  clk: uniphier: add ethernet clock control support for PXs3
  clk: uniphier: add Pro4/Pro5/PXs2 audio system clock

* clk-ti-flag-fix:
  clk: ti: fix flag space conflict with clkctrl clocks
  clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks</title>
<updated>2018-03-20T17:16:26Z</updated>
<author>
<name>David Lechner</name>
<email>david@lechnology.com</email>
</author>
<published>2018-03-16T02:52:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0c92c71770457df9c5459190ba72350459785f37'/>
<id>urn:sha1:0c92c71770457df9c5459190ba72350459785f37</id>
<content type='text'>
This adds a new binding for the clocks present in the CFGCHIP syscon
registers in TI DA8XX SoCs.

Signed-off-by: David Lechner &lt;david@lechnology.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: New bindings for TI Davinci PSC</title>
<updated>2018-03-20T17:16:26Z</updated>
<author>
<name>David Lechner</name>
<email>david@lechnology.com</email>
</author>
<published>2018-03-16T02:52:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=21cdf7269f9dcd8dc22d152fbfee85e4ea57289f'/>
<id>urn:sha1:21cdf7269f9dcd8dc22d152fbfee85e4ea57289f</id>
<content type='text'>
This adds a new binding for the Power Sleep Controller (PSC) for the
mach-davinci family of processors.

Note: Although TI Keystone has a very similar PSC, we are not using the
existing bindings. Keystone is using a legacy one-node-per-clock binding
(actually two nodes if you count the separate reset binding for the same
IP block). Also, some davinci LPSCs have quirks that aren't handled by
the keystone bindings, so we would be adding one compatible string per
clock with quirks instead of just a new compatible string for each
controller.

Signed-off-by: David Lechner &lt;david@lechnology.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add new bindings for TI Davinci PLL clocks</title>
<updated>2018-03-20T16:33:08Z</updated>
<author>
<name>David Lechner</name>
<email>david@lechnology.com</email>
</author>
<published>2018-03-16T02:52:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b6e37ce2371dac0d696332d8e74c110030ab47c3'/>
<id>urn:sha1:b6e37ce2371dac0d696332d8e74c110030ab47c3</id>
<content type='text'>
This adds a new binding for the PLL IP blocks in the mach-davinci
family of processors. Currently, only da850 has device tree support
but these bindings can also work for other SoCs in this family just
by adding new compatible strings.

Note: Although these PLL controllers are very similar to the TI Keystone
SoCs, we are not re-using those bindings. The Keystone bindings use a
legacy one-node-per-clock binding. Furthermore, the mach-davinici SoCs
have a slightly different PLL register layout and a number of quirks
that can't be handled by the existing bindings, so the keystone bindings
could not be used as-is anyway.

Signed-off-by: David Lechner &lt;david@lechnology.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
