<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/Documentation/devicetree/bindings/cpufreq, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/cpufreq?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/cpufreq?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-06-06T17:17:00Z</updated>
<entry>
<title>dt-bindings: interrupt-controller: update brcm,l2-intc.yaml reference</title>
<updated>2022-06-06T17:17:00Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab@kernel.org</email>
</author>
<published>2022-06-06T15:25:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7e40381d8a33e41e347cea5bdd000091653000c6'/>
<id>urn:sha1:7e40381d8a33e41e347cea5bdd000091653000c6</id>
<content type='text'>
Changeset 539d25b21fe8 ("dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML")
renamed: Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt
to: Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml.

Update its cross-reference accordingly.

Fixes: 539d25b21fe8 ("dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML")
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/a40c02a7aaea91ea7b6ce24b6bc574ae5bcf4cf6.1654529011.git.mchehab@kernel.org
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: mediatek: Add MediaTek CCI property</title>
<updated>2022-05-12T05:08:14Z</updated>
<author>
<name>Rex-BC Chen</name>
<email>rex-bc.chen@mediatek.com</email>
</author>
<published>2022-05-05T11:52:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=818c8321d8def50971188b8b33ef2a43ca1e2511'/>
<id>urn:sha1:818c8321d8def50971188b8b33ef2a43ca1e2511</id>
<content type='text'>
MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module
for scaling clock frequency and adjust voltage.
The phandle could be linked between CPU and MediaTek CCI for some
MediaTek SoCs, like MT8183 and MT8186.

The reason we need the link status between cpufreq and MediaTek cci is
cpufreq and mediatek cci could share the same regulator in some MediaTek
SoCs. Therefore, to prevent the issue of high frequency and low voltage,
we need to use this to make sure mediatek cci is ready.

Signed-off-by: Rex-BC Chen &lt;rex-bc.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'pm-opp'</title>
<updated>2022-03-29T16:52:32Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2022-03-29T16:52:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=79bc8bface8767078d6803debaef54f044117731'/>
<id>urn:sha1:79bc8bface8767078d6803debaef54f044117731</id>
<content type='text'>
Merge OPP (Operating Performance Points) changes for 5.18-rc1.

* pm-opp:
  Documentation: EM: Describe new registration method using DT
  OPP: Add support of "opp-microwatt" for EM registration
  PM: EM: add macro to set .active_power() callback conditionally
  OPP: Add "opp-microwatt" supporting code
  dt-bindings: opp: Add "opp-microwatt" entry in the OPP
  dt-bindings: power: avs: qcom,cpr: Convert to DT schema
  arm64: dts: qcom: qcs404: Rename CPU and CPR OPP tables
  arm64: dts: qcom: msm8996: Rename cluster OPP tables
  dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
  dt-bindings: opp: qcom-opp: Convert to DT schema
  arm64: dts: qcom: msm8996-mtp: Add msm8996 compatible
  dt-bindings: arm: qcom: Add msm8996 and apq8096 compatibles
  opp: Expose of-node's name in debugfs
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings</title>
<updated>2022-03-11T03:30:26Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-03-09T15:15:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b7f2b0d3511a6bbf9387f08f370f9125663e18d8'/>
<id>urn:sha1:b7f2b0d3511a6bbf9387f08f370f9125663e18d8</id>
<content type='text'>
Convert Qualcomm cpufreq devicetree binding to YAML.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema</title>
<updated>2022-02-11T04:33:51Z</updated>
<author>
<name>Yassine Oudjana</name>
<email>y.oudjana@protonmail.com</email>
</author>
<published>2022-02-03T07:26:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec24d1d55469b66f5d4393dc8cebc5ac8f4fc683'/>
<id>urn:sha1:ec24d1d55469b66f5d4393dc8cebc5ac8f4fc683</id>
<content type='text'>
Convert qcom-nvmem-cpufreq to DT schema format, splitting it into
an OPP schema and a CPUFreq schema in the process.

Signed-off-by: Yassine Oudjana &lt;y.oudjana@protonmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'pm-opp'</title>
<updated>2021-09-08T14:42:13Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2021-09-08T14:42:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f76c87e8c33766cc6a7bf7461dfac9cebb05b5df'/>
<id>urn:sha1:f76c87e8c33766cc6a7bf7461dfac9cebb05b5df</id>
<content type='text'>
* pm-opp:
  dt-bindings: opp: Convert to DT schema
  dt-bindings: Clean-up OPP binding node names in examples
  ARM: dts: omap: Drop references to opp.txt
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW</title>
<updated>2021-09-06T09:44:30Z</updated>
<author>
<name>Hector.Yuan</name>
<email>hector.yuan@mediatek.com</email>
</author>
<published>2021-09-03T08:39:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a8bbe0c9440561cb407cefc0b1def808c2c38431'/>
<id>urn:sha1:a8bbe0c9440561cb407cefc0b1def808c2c38431</id>
<content type='text'>
Add devicetree bindings for MediaTek HW driver.

Signed-off-by: Hector.Yuan &lt;hector.yuan@mediatek.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: opp: Convert to DT schema</title>
<updated>2021-08-23T07:14:55Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-07-20T14:41:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=94274f20f6bf5eb0099bbf7e133aac1f5cd087e8'/>
<id>urn:sha1:94274f20f6bf5eb0099bbf7e133aac1f5cd087e8</id>
<content type='text'>
Convert the OPP v1 and v2 bindings to DT schema format. As the OPPv2 binding
can be extended by vendors, we need to split the common part out from the
"operating-points-v2" conforming compatible.

Cc: Yangtao Li &lt;tiny.windzz@gmail.com&gt;
Cc: Nishanth Menon &lt;nm@ti.com&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: update cpu type and clock name for MT8173 SoC</title>
<updated>2021-06-04T03:54:26Z</updated>
<author>
<name>Seiya Wang</name>
<email>seiya.wang@mediatek.com</email>
</author>
<published>2021-06-01T07:10:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9821a195d4e263801884b105554e801642c59f2a'/>
<id>urn:sha1:9821a195d4e263801884b105554e801642c59f2a</id>
<content type='text'>
Update the cpu type of cpu2 and cpu3 since MT8173 used Cortex-a72.

Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Seiya Wang &lt;seiya.wang@mediatek.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: cpufreq-qcom-hw: Document Qcom EPSS compatible</title>
<updated>2020-09-16T08:42:18Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2020-09-15T07:24:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=75319b4600e7b7adfec80ea0a3ccc07f22290c89'/>
<id>urn:sha1:75319b4600e7b7adfec80ea0a3ccc07f22290c89</id>
<content type='text'>
The hardware block which carries out CPUFreq operations on SM8250 SoC is
called EPSS. Hence, document the compatible.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Amit Kucheria &lt;amitk@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
</feed>
