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<title>linux-dev/Documentation/devicetree/bindings/cpufreq, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/cpufreq?h=master</id>
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<updated>2022-08-03T15:47:45Z</updated>
<entry>
<title>Merge tag 'cpufreq-arm-updates-5.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm</title>
<updated>2022-08-03T15:47:45Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2022-08-03T15:47:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7912c9c6a6e8ebda603facfe314701c0e45440bb'/>
<id>urn:sha1:7912c9c6a6e8ebda603facfe314701c0e45440bb</id>
<content type='text'>
Pull cpufreq/ARM updates for 5.20-rc1 from Viresh Kumar:

"- Fix return error code in mtk_cpu_dvfs_info_init (Yang Yingliang).

 - Minor cleanups and support for new boards for Qcom cpufreq drivers
   (Bryan O'Donoghue, Konrad Dybcio, Pierre Gondois, and Yicong Yang).

 - Fix sparse warnings for Tegra driver (Viresh Kumar)."

* tag 'cpufreq-arm-updates-5.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  cpufreq: tegra194: Staticize struct tegra_cpufreq_soc instances
  dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6375 compatible
  dt-bindings: opp: Add msm8939 to the compatible list
  dt-bindings: opp: Add missing compat devices
  dt-bindings: opp: opp-v2-kryo-cpu: Fix example binding checks
  cpufreq: Change order of online() CB and policy-&gt;cpus modification
  cpufreq: qcom-hw: Remove deprecated irq_set_affinity_hint() call
  cpufreq: qcom-hw: Disable LMH irq when disabling policy
  cpufreq: qcom-hw: Reset cancel_throttle when policy is re-enabled
  cpufreq: qcom-cpufreq-hw: use HZ_PER_KHZ macro in units.h
  cpufreq: mediatek: fix error return code in mtk_cpu_dvfs_info_init()
</content>
</entry>
<entry>
<title>Merge tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt</title>
<updated>2022-07-21T12:56:57Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2022-07-21T12:56:56Z</published>
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<id>urn:sha1:2c947cd63bfb90456d3daecaf8c3d0f6b8661739</id>
<content type='text'>
More Qualcomm ARM64 DTS updates for v5.20

Related to SDM845, the Xiaomi Mi Mix2s is introduced, the DB845c on
SDM845 gains support for the second GPI DMA controller and has the GENI
I2C and SPI instances wired up to their respective GPI DMA controller.

QCS404 USB controller and PHY assignment is corrected and IPQ8074 gains
APCS definition to handle outgoing IPC interrupts.

Lastly a range of Devicetree validation issues are addressed.

* tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (53 commits)
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  dt-bindings: arm: qcom: add missing MSM8992 board compatibles
  dt-bindings: arm: qcom: add missing MSM8998 board compatibles
  dt-bindings: vendor-prefixes: add Shift GmbH
  dt-bindings: arm: qcom: add missing SM8350 board compatibles
  dt-bindings: arm: qcom: add missing SM8250 board compatibles
  dt-bindings: arm: qcom: add missing SM8150 board compatibles
  dt-bindings: arm: qcom: add missing MSM8994 board compatibles
  dt-bindings: arm: qcom: add missing MSM8916 board compatibles
  dt-bindings: arm: qcom: fix MSM8994 boards compatibles
  dt-bindings: arm: qcom: fix MSM8916 MTP compatibles
  dt-bindings: arm: qcom: fix Longcheer L8150 compatibles
  ...

Link: https://lore.kernel.org/r/20220720231643.2114565-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: arm: qcom: add missing QCS404 board compatibles</title>
<updated>2022-07-20T17:23:00Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-05-21T16:45:42Z</published>
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<id>urn:sha1:09b75a927ffd453a4bc25d88d4c4dca3b12eaf99</id>
<content type='text'>
Document board compatibles already present in Linux kernel.

In itself this resulted in a dt_binding_check in qcom-cpufrq-nvmem.yaml,
which was reported by Rob, solved in below change by Krzysztof and acked
by Viresh. The fix is squashed into this to avoid bisect problems.
Link: https://lore.kernel.org/r/20220627143340.477120-1-krzysztof.kozlowski@linaro.org

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20220521164550.91115-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6375 compatible</title>
<updated>2022-07-18T01:58:19Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@somainline.org</email>
</author>
<published>2022-07-16T19:32:55Z</published>
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<id>urn:sha1:172a672af95c022071b9dacdf8a647c193d0edbd</id>
<content type='text'>
Add compatible for EPSS CPUFREQ-HW on SM6375.

Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: opp: Add msm8939 to the compatible list</title>
<updated>2022-07-18T01:52:24Z</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2022-07-08T12:11:56Z</published>
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<id>urn:sha1:a0c999b8a7b9c7ac4ba11b0dff37f9536a728be6</id>
<content type='text'>
msm8939 will uses this driver instead of the generic dt-cpufreq. Add to the
compatible list.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: opp: Add missing compat devices</title>
<updated>2022-07-18T01:52:24Z</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2022-07-08T12:11:55Z</published>
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<id>urn:sha1:228f901ccec83b05e4657897aeb460beb294d2e5</id>
<content type='text'>
A number of devices listed in drivers/cpufreq/qcom-cpufreq-nvmem.c appear
to be missing from the compatible list.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: interrupt-controller: update brcm,l2-intc.yaml reference</title>
<updated>2022-06-06T17:17:00Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab@kernel.org</email>
</author>
<published>2022-06-06T15:25:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7e40381d8a33e41e347cea5bdd000091653000c6'/>
<id>urn:sha1:7e40381d8a33e41e347cea5bdd000091653000c6</id>
<content type='text'>
Changeset 539d25b21fe8 ("dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML")
renamed: Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt
to: Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml.

Update its cross-reference accordingly.

Fixes: 539d25b21fe8 ("dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML")
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/a40c02a7aaea91ea7b6ce24b6bc574ae5bcf4cf6.1654529011.git.mchehab@kernel.org
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: mediatek: Add MediaTek CCI property</title>
<updated>2022-05-12T05:08:14Z</updated>
<author>
<name>Rex-BC Chen</name>
<email>rex-bc.chen@mediatek.com</email>
</author>
<published>2022-05-05T11:52:17Z</published>
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<id>urn:sha1:818c8321d8def50971188b8b33ef2a43ca1e2511</id>
<content type='text'>
MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module
for scaling clock frequency and adjust voltage.
The phandle could be linked between CPU and MediaTek CCI for some
MediaTek SoCs, like MT8183 and MT8186.

The reason we need the link status between cpufreq and MediaTek cci is
cpufreq and mediatek cci could share the same regulator in some MediaTek
SoCs. Therefore, to prevent the issue of high frequency and low voltage,
we need to use this to make sure mediatek cci is ready.

Signed-off-by: Rex-BC Chen &lt;rex-bc.chen@mediatek.com&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'pm-opp'</title>
<updated>2022-03-29T16:52:32Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2022-03-29T16:52:32Z</published>
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<id>urn:sha1:79bc8bface8767078d6803debaef54f044117731</id>
<content type='text'>
Merge OPP (Operating Performance Points) changes for 5.18-rc1.

* pm-opp:
  Documentation: EM: Describe new registration method using DT
  OPP: Add support of "opp-microwatt" for EM registration
  PM: EM: add macro to set .active_power() callback conditionally
  OPP: Add "opp-microwatt" supporting code
  dt-bindings: opp: Add "opp-microwatt" entry in the OPP
  dt-bindings: power: avs: qcom,cpr: Convert to DT schema
  arm64: dts: qcom: qcs404: Rename CPU and CPR OPP tables
  arm64: dts: qcom: msm8996: Rename cluster OPP tables
  dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema
  dt-bindings: opp: qcom-opp: Convert to DT schema
  arm64: dts: qcom: msm8996-mtp: Add msm8996 compatible
  dt-bindings: arm: qcom: Add msm8996 and apq8096 compatibles
  opp: Expose of-node's name in debugfs
</content>
</entry>
<entry>
<title>dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings</title>
<updated>2022-03-11T03:30:26Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-03-09T15:15:41Z</published>
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<id>urn:sha1:b7f2b0d3511a6bbf9387f08f370f9125663e18d8</id>
<content type='text'>
Convert Qualcomm cpufreq devicetree binding to YAML.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
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