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<title>linux-dev/Documentation/devicetree/bindings/iommu, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/iommu?h=master</id>
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<updated>2022-10-10T20:20:53Z</updated>
<entry>
<title>Merge tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2022-10-10T20:20:53Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-10T20:20:53Z</published>
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<id>urn:sha1:f23cdfcd04f7c044ee47dac04484b8d289088776</id>
<content type='text'>
Pull iommu updates from Joerg Roedel:

 - remove the bus_set_iommu() interface which became unnecesary because
   of IOMMU per-device probing

 - make the dma-iommu.h header private

 - Intel VT-d changes from Lu Baolu:
	  - Decouple PASID and PRI from SVA
	  - Add ESRTPS &amp; ESIRTPS capability check
	  - Cleanups

 - Apple DART support for the M1 Pro/MAX SOCs

 - support for AMD IOMMUv2 page-tables for the DMA-API layer.

   The v2 page-tables are compatible with the x86 CPU page-tables. Using
   them for DMA-API prepares support for hardware-assisted IOMMU
   virtualization

 - support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver

 - some smaller fixes and cleanups

* tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits)
  iommu/vt-d: Avoid unnecessary global DMA cache invalidation
  iommu/vt-d: Avoid unnecessary global IRTE cache invalidation
  iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support
  iommu/vt-d: Remove pasid_set_eafe()
  iommu/vt-d: Decouple PASID &amp; PRI enabling from SVA
  iommu/vt-d: Remove unnecessary SVA data accesses in page fault path
  dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names
  iommu: dart: Support t6000 variant
  iommu/io-pgtable-dart: Add DART PTE support for t6000
  iommu/io-pgtable: Add DART subpage protection support
  iommu/io-pgtable: Move Apple DART support to its own file
  iommu/mediatek: Add support for MT6795 Helio X10 M4Us
  iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173
  dt-bindings: mediatek: Add bindings for MT6795 M4U
  iommu/iova: Fix module config properly
  iommu/amd: Fix sparse warning
  iommu/amd: Remove outdated comment
  iommu/amd: Free domain ID after domain_flush_pages
  iommu/amd: Free domain id in error path
  iommu/virtio: Fix compile error with viommu_capable()
  ...
</content>
</entry>
<entry>
<title>Merge branches 'apple/dart', 'arm/mediatek', 'arm/omap', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next</title>
<updated>2022-09-26T13:52:31Z</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2022-09-26T13:52:31Z</published>
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<id>urn:sha1:38713c6028a3172c4c256512c3fbcfc799fe2d43</id>
<content type='text'>
</content>
</entry>
<entry>
<title>dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names</title>
<updated>2022-09-26T12:05:58Z</updated>
<author>
<name>Jean-Philippe Brucker</name>
<email>jean-philippe@linaro.org</email>
</author>
<published>2022-09-16T13:31:47Z</published>
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<id>urn:sha1:d2f2f1d10ccdb96aeea38c5ec647679fcc093b84</id>
<content type='text'>
The QEMU devicetree uses a different order for SMMUv3 interrupt names,
and there isn't a good reason for enforcing a specific order. Since all
interrupt lines are optional, operating systems should not expect a
fixed interrupt array layout; they should instead match each interrupt
to its name individually. Besides, as a result of commit e4783856a2e8
("dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional"), "cmdq-sync"
and "priq" are already permutable. Relax the interrupt-names array
entirely by allowing any permutation, incidentally making the schema
more readable.

Note that dt-validate won't allow duplicate names here so we don't need
to specify maxItems or add additional checks, it's quite neat.

Signed-off-by: Jean-Philippe Brucker &lt;jean-philippe@linaro.org&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20220916133145.1910549-1-jean-philippe@linaro.org
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mediatek: Add bindings for MT6795 M4U</title>
<updated>2022-09-26T11:33:02Z</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2022-09-13T15:11:46Z</published>
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<id>urn:sha1:4e5f8465c65ed6b2c1878cca2727a741725be341</id>
<content type='text'>
Add bindings for the MediaTek Helio X10 (MT6795) IOMMU/M4U.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/20220913151148.412312-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Remove 'Device Tree Bindings' from end of title:</title>
<updated>2022-08-25T19:06:57Z</updated>
<author>
<name>Andrew Lunn</name>
<email>andrew@lunn.ch</email>
</author>
<published>2022-08-25T02:04:27Z</published>
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<id>urn:sha1:dd3cb467ebb5659d6552999d6f16a616653f9933</id>
<content type='text'>
As indicated in
link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/

DT schema files should not have 'Device Tree Binding' as part of there
title: line. Remove this in most .yaml files, so hopefully preventing
developers copying it into new .yaml files, and being asked to remove
it.

Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'arm/exynos', 'arm/mediatek', 'arm/msm', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next</title>
<updated>2022-07-29T10:06:56Z</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2022-07-29T10:06:56Z</published>
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<id>urn:sha1:c10100a416c16b598bf5155e759307b34dac0d7d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu</title>
<updated>2022-07-22T14:33:13Z</updated>
<author>
<name>Joerg Roedel</name>
<email>jroedel@suse.de</email>
</author>
<published>2022-07-22T14:33:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d4ebd11f32a12986972a360be4d7136bb3a3855b'/>
<id>urn:sha1:d4ebd11f32a12986972a360be4d7136bb3a3855b</id>
<content type='text'>
Arm SMMU updates for 5.20

- Add even more Qualcomm device-tree compatible strings

- Support dumping of IMP DEF Qualcomm registers on TLB sync timeout

- Fix reference count leak on device tree node in Qualcomm driver
</content>
</entry>
<entry>
<title>dt-bindings: arm-smmu: Add compatible for Qualcomm SM6375</title>
<updated>2022-07-19T17:24:28Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@somainline.org</email>
</author>
<published>2022-07-16T19:32:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=743302d4ad6cf51f6abffed4f12d2d0c24e3288a'/>
<id>urn:sha1:743302d4ad6cf51f6abffed4f12d2d0c24e3288a</id>
<content type='text'>
Add a compatible for Qualcomm SM6375's broken-as-usual MMU500 impl.

Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20220716193223.455859-1-konrad.dybcio@somainline.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: iommu: mediatek: Add mediatek,infracfg phandle</title>
<updated>2022-06-22T13:44:25Z</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2022-06-16T11:08:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d034dbbb9b2ac32aa06c104701fdf81ebdfea9a2'/>
<id>urn:sha1:d034dbbb9b2ac32aa06c104701fdf81ebdfea9a2</id>
<content type='text'>
Add property "mediatek,infracfg" to let the mtk_iommu driver retrieve
a phandle to the infracfg syscon instead of performing a per-soc
compatible lookup in the entire devicetree and set it as a required
property for MT2712 and MT8173.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/20220616110830.26037-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Add xen,grant-dma IOMMU description for xen-grant DMA ops</title>
<updated>2022-06-06T14:07:30Z</updated>
<author>
<name>Oleksandr Tyshchenko</name>
<email>oleksandr_tyshchenko@epam.com</email>
</author>
<published>2022-06-02T19:23:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=add413a1d966d8458571a2571881903d234a9f8e'/>
<id>urn:sha1:add413a1d966d8458571a2571881903d234a9f8e</id>
<content type='text'>
The main purpose of this binding is to communicate Xen specific
information using generic IOMMU device tree bindings (which is
a good fit here) rather than introducing a custom property.

Introduce Xen specific IOMMU for the virtualized device (e.g. virtio)
to be used by Xen grant DMA-mapping layer in the subsequent commit.

The reference to Xen specific IOMMU node using "iommus" property
indicates that Xen grant mappings need to be enabled for the device,
and it specifies the ID of the domain where the corresponding backend
resides. The domid (domain ID) is used as an argument to the Xen grant
mapping APIs.

This is needed for the option to restrict memory access using Xen grant
mappings to work which primary goal is to enable using virtio devices
in Xen guests.

Signed-off-by: Oleksandr Tyshchenko &lt;oleksandr_tyshchenko@epam.com&gt;
Reviewed-by: Stefano Stabellini &lt;sstabellini@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/1654197833-25362-6-git-send-email-olekstysh@gmail.com
Signed-off-by: Juergen Gross &lt;jgross@suse.com&gt;
</content>
</entry>
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