<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/Documentation/devicetree/bindings/mailbox, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/mailbox?h=master</id>
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<updated>2022-10-10T20:13:51Z</updated>
<entry>
<title>Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2022-10-10T20:13:51Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-10T20:13:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=706eacadd5c5cc13510ba69eea2917c2ce5ffa99'/>
<id>urn:sha1:706eacadd5c5cc13510ba69eea2917c2ce5ffa99</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT core:

   - Fix node refcounting in of_find_last_cache_level()

   - Constify device_node in of_device_compatible_match()

   - Fix 'dma-ranges' handling in bus controller nodes

   - Fix handling of initrd start &gt; end

   - Improve error reporting in of_irq_init()

   - Taint kernel on DT unittest running

   - Use strscpy instead of strlcpy

   - Add a build target, dt_compatible_check, to check for compatible
     strings used in kernel sources against compatible strings in DT
     schemas.

   - Handle DT_SCHEMA_FILES changes when rebuilding

  DT bindings:

   - LED bindings for MT6370 PMIC

   - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
     mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
     and arm,versatile-sysreg to DT schema format

   - Add nvmem cells to u-boot,env schema

   - Add more LED_COLOR_ID definitions

   - Require 'opp-table' uses to be a node

   - Various schema fixes to match QEMU 'virt' DT usage

   - Tree wide dropping of redundant 'Device Tree Binding' in schema
     titles

   - More (unevaluated|additional)Properties fixes in schema child nodes

   - Drop various redundant minItems equal to maxItems"

* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
  of: base: Shift refcount decrement in of_find_last_cache_level()
  dt-bindings: leds: Add MediaTek MT6370 flashlight
  dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
  dt-bindings: mailbox: Convert mtk-gce to DT schema
  of: base: make of_device_compatible_match() accept const device node
  of: Fix "dma-ranges" handling for bus controllers
  of: fdt: Remove unused struct fdt_scan_status
  dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
  dt-bindings: timer: Add power-domains for TI timer-dm on K3
  dt: Add a check for undocumented compatible strings in kernel
  kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
  dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
  dt-bindings: i2c: migrate mt7621 text bindings to YAML
  dt-bindings: power: gpcv2: correct patternProperties
  dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
  dt-bindings: timer: arm,arch_timer: Allow dual compatible string
  dt-bindings: arm: cpus: Add kryo240 compatible
  dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
  dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
  dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
  ...
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: correct clocks for IPQ6018 and IPQ8074</title>
<updated>2022-10-06T02:49:54Z</updated>
<author>
<name>Robert Marko</name>
<email>robimarko@gmail.com</email>
</author>
<published>2022-08-18T22:08:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=75d439edb1550d3cc7f33c1fd4abe4aef288d780'/>
<id>urn:sha1:75d439edb1550d3cc7f33c1fd4abe4aef288d780</id>
<content type='text'>
IPQ6018 APSS driver is registered by APCS as they share the same register
space, and it uses "pll" and "xo" as inputs.

Correct the allowed clocks for IPQ6018 and IPQ8074 as they share the same
driver to allow "pll" and "xo" as clock-names.

Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: set correct #clock-cells</title>
<updated>2022-10-06T02:49:48Z</updated>
<author>
<name>Robert Marko</name>
<email>robimarko@gmail.com</email>
</author>
<published>2022-08-18T22:08:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f3d961299cdd484e1aeb60b392a4c5efaf323a9c'/>
<id>urn:sha1:f3d961299cdd484e1aeb60b392a4c5efaf323a9c</id>
<content type='text'>
IPQ6018 and IPQ8074 require #clock-cells to be set to 1 as their APSS
clock driver provides multiple clock outputs.

So allow setting 1 as #clock-cells and check that its set to 1 for IPQ6018
and IPQ8074, check others for 0 as its currently.

Signed-off-by: Robert Marko &lt;robimarko@gmail.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: fix the mpfs' reg property</title>
<updated>2022-10-06T02:48:25Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-08-24T07:08:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6e2bdf7dc3c817dd91d84adb306a5dfab999c309'/>
<id>urn:sha1:6e2bdf7dc3c817dd91d84adb306a5dfab999c309</id>
<content type='text'>
The "data" region of the PolarFire SoC's system controller mailbox is
not one continuous register space - the system controller's QSPI sits
between the control and data registers. Split the "data" reg into two
parts: "data" &amp; "control".

Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: Convert mtk-gce to DT schema</title>
<updated>2022-10-03T14:58:10Z</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2022-09-21T09:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=cd425807288579bac95f2cdcbd98dba53a76f55a'/>
<id>urn:sha1:cd425807288579bac95f2cdcbd98dba53a76f55a</id>
<content type='text'>
Convert the mtk-gce mailbox binding to DT schema format.

During the conversion, the examples for client device/mutex nodes
were removed, as these are found in their respective bindings:
arm/mediatek/mediatek,mmsys.yaml for "mediatek,mt8173-mmsys"
soc/mediatek/mediatek,mutex.yaml for "mediatek,mt8173-disp-mutex"

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20220921090006.37642-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: Update email of Neil Armstrong</title>
<updated>2022-08-18T17:23:00Z</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2022-08-16T09:56:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c6a43fb3487f7e040170e60cdb9b030c669e9cf5'/>
<id>urn:sha1:c6a43fb3487f7e040170e60cdb9b030c669e9cf5</id>
<content type='text'>
My professional e-mail will change and the BayLibre one will
bounce after mid-september of 2022.

This updates the MAINTAINERS file, the YAML bindings and adds an
entry in the .mailmap file.

Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20220816095617.948678-1-narmstrong@baylibre.com
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: arm,mhu: Make secure interrupt optional</title>
<updated>2022-08-10T21:12:49Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2022-07-28T19:08:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2ac2920cd8d9334e24bfd30d518010f99077a947'/>
<id>urn:sha1:2ac2920cd8d9334e24bfd30d518010f99077a947</id>
<content type='text'>
The secure interrupt is only useful to secure world, therefore for NS
users it shouldn't be required. Make it optional.

This fixes a warning on Arm Juno board:

mhu@2b1f0000: interrupts: [[0, 36, 4], [0, 35, 4]] is too short

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Link: https://lore.kernel.org/r/20220728190810.1290857-1-robh@kernel.org
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom-ipcc: Add SM6375 compatible</title>
<updated>2022-08-02T20:12:15Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@somainline.org</email>
</author>
<published>2022-07-16T19:32:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1a607e102fe0f04491fb69c5a233aad139d9d1d6'/>
<id>urn:sha1:1a607e102fe0f04491fb69c5a233aad139d9d1d6</id>
<content type='text'>
Add a compatible for SM6375.

Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: imx-mu: add RST channel</title>
<updated>2022-08-02T20:09:54Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-06-15T13:00:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=095730dd4ca5fe078fd07db5be68b3026d4ae48a'/>
<id>urn:sha1:095730dd4ca5fe078fd07db5be68b3026d4ae48a</id>
<content type='text'>
i.MX MU has a MUR bit which is to reset both the Processor B and the
Processor A sides of the MU module, forcing all control and status
registers to return to their default values (except the BHR bit in the ACR
register and BHRM bit in BCR register), and all internal states to be
cleared.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom,apcs-kpss-global: Add syscon const for relevant entries</title>
<updated>2022-08-02T20:08:43Z</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>bryan.odonoghue@linaro.org</email>
</author>
<published>2022-07-18T11:55:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=60545466180e791827c84795e7b4828dbeb9e061'/>
<id>urn:sha1:60545466180e791827c84795e7b4828dbeb9e061</id>
<content type='text'>
msm8916, msm8939, msm8953, msm8994 and qcs404 already declare or should
declare syscon as they have drivers that use syscon inside of the apcs-kpss
block.

grep apcs arch/arm64/boot/dts/qcom/* | grep syscon

Add in the additional syscon in the documentation for the above mentioned
parts.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
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