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<title>linux-dev/Documentation/devicetree/bindings/memory-controllers/synopsys.txt, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/memory-controllers/synopsys.txt?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/memory-controllers/synopsys.txt?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-08-18T19:08:42Z</updated>
<entry>
<title>dt-bindings: memory: convert Synopsys IntelliDDR memory controller to dtschema</title>
<updated>2021-08-18T19:08:42Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@canonical.com</email>
</author>
<published>2021-08-18T11:31:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=47e397a575221e6ccb6a4df6c615270ed4c38cda'/>
<id>urn:sha1:47e397a575221e6ccb6a4df6c615270ed4c38cda</id>
<content type='text'>
Convert Synopsys IntelliDDR Multi Protocol memory controller (present in
Xilinx Zynq and ZynqMP) bindings to DT schema format using json-schema.

New binding contains copied parts of description from previous binding
document, therefore the license is set as GPL-2.0-only.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Link: https://lore.kernel.org/r/20210818113139.84869-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt: bindings: Document ZynqMP DDRC in Synopsys documentation</title>
<updated>2018-11-05T12:39:20Z</updated>
<author>
<name>Manish Narani</name>
<email>manish.narani@xilinx.com</email>
</author>
<published>2018-10-25T06:06:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fb6a691a23ca4bcf10bbda603e22021776d51d56'/>
<id>urn:sha1:fb6a691a23ca4bcf10bbda603e22021776d51d56</id>
<content type='text'>
Add information for ZynqMP DDRC which reports the single bit errors that
are corrected and the double bit errors that are detected.

Signed-off-by: Manish Narani &lt;manish.narani@xilinx.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
CC: Mark Rutland &lt;mark.rutland@arm.com&gt;
CC: amit.kucheria@linaro.org
CC: devicetree@vger.kernel.org
CC: leoyang.li@nxp.com
CC: linux-arm-kernel@lists.infradead.org
CC: linux-edac &lt;linux-edac@vger.kernel.org&gt;
CC: mchehab@kernel.org
CC: michal.simek@xilinx.com
CC: sudeep.holla@arm.com
Link: http://lkml.kernel.org/r/1540447621-22870-3-git-send-email-manish.narani@xilinx.com
</content>
</entry>
<entry>
<title>Documentation: devicetree: Add ECC information to synopsys ddr controller</title>
<updated>2015-07-31T08:50:05Z</updated>
<author>
<name>Punnaiah Choudary Kalluri</name>
<email>punnaiah.choudary.kalluri@xilinx.com</email>
</author>
<published>2014-11-27T15:17:33Z</published>
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<id>urn:sha1:1837649fd350bf25e20d05dbdd4449160ad0219b</id>
<content type='text'>
Add ECC information to synopsys ddr memory controller.

Signed-off-by: Punnaiah Choudary Kalluri &lt;punnaia@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>Documentation: devicetree: Add binding for Synopsys DDR controller</title>
<updated>2014-09-16T10:55:05Z</updated>
<author>
<name>Soren Brinkmann</name>
<email>soren.brinkmann@xilinx.com</email>
</author>
<published>2014-09-02T21:19:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c07c8b007732dacafd4ba9cda04ea9b9d0e8ec7d'/>
<id>urn:sha1:c07c8b007732dacafd4ba9cda04ea9b9d0e8ec7d</id>
<content type='text'>
Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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