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<title>linux-dev/Documentation/devicetree/bindings/pci, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/Documentation/devicetree/bindings/pci?h=master</id>
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<updated>2022-10-11T18:08:18Z</updated>
<entry>
<title>Merge tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2022-10-11T18:08:18Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-11T18:08:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=041bc24d867a2a577a06534d6d25e500b24a01ef'/>
<id>urn:sha1:041bc24d867a2a577a06534d6d25e500b24a01ef</id>
<content type='text'>
Pull pci updates from Bjorn Helgaas:
 "Resource management:

   - Distribute spare resources to unconfigured hotplug bridges at
     boot-time (not just when hot-adding such a bridge), which makes
     hot-adding devices to docks work better.

   - Revert to a BAR assignment inherited from firmware only when the
     address is actually reachable via any upstream bridges, which fixes
     some cases where firmware doesn't configure all devices.

   - Add a sysfs interface to resize BARs so this can be done before
     assigning devices to a VM through VFIO.

  Power management:

   - Disable Precision Time Management for all devices on suspend to
     enable lower-power PM state. We previously did this just for Root
     Ports, which isn't enough because downstream devices can still
     generate PTM messages, which cause errors if it's disabled in the
     Root Port.

   - Save and restore the ASPM L1 PM Substates configuration for
     suspend/ resume. Previously this configuration was lost, so L1.x
     states likely stopped working after resume.

   - Check whether the L1 PM Substates Capability exists. If it didn't
     exist, we previously read junk and tried to configure L1 Substates
     based on that.

   - Fix the LTR_L1.2_THRESHOLD computation, which previously set a
     threshold for entering L1.2 that was too low in some cases.

   - Reduce the delay after transitions to or from D3cold by using
     usleep_range() rather than msleep(), which often slept for ~19ms
     instead of the 10ms normally required. The spec says 10ms is
     enough, but it's possible we could trip over devices that need a
     little more.

  Error handling:

   - Work around a BIOS bug that caused Intel Root Ports to advertise a
     Root Port Programmed I/O (RP PIO) log size of zero, which caused
     annoying warnings and prevented the kernel from dumping log
     registers for DPC errors.

  Qualcomm PCIe controller driver:

   - Add support for SC8280XP and SA8540P host controllers and SM8450
     endpoint controller.

   - Disable Master AXI clock on endpoint controllers to save power when
     link is idle or in L1.x.

   - Expose link state transition counts via debugfs to help debug
     issues with low-power states.

   - Add auto-loading module support.

  Synopsys DesignWare PCIe controller driver:

   - Remove a dependency on ZONE_DMA32 by allocating the MSI target page
     differently. There's more work to do related to eDMA controllers,
     so it's not completely settled"

* tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (71 commits)
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: Expose PCIe Resizable BAR support via sysfs
  PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation
  PCI/ASPM: Ignore L1 PM Substates if device lacks capability
  PCI/ASPM: Factor out L1 PM Substates configuration
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
  PCI/ASPM: Refactor L1 PM Substates Control Register programming
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  phy: freescale: imx8m-pcie: Fix the wrong order of phy_init() and phy_power_on()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2022-10-10T20:13:51Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-10T20:13:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=706eacadd5c5cc13510ba69eea2917c2ce5ffa99'/>
<id>urn:sha1:706eacadd5c5cc13510ba69eea2917c2ce5ffa99</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT core:

   - Fix node refcounting in of_find_last_cache_level()

   - Constify device_node in of_device_compatible_match()

   - Fix 'dma-ranges' handling in bus controller nodes

   - Fix handling of initrd start &gt; end

   - Improve error reporting in of_irq_init()

   - Taint kernel on DT unittest running

   - Use strscpy instead of strlcpy

   - Add a build target, dt_compatible_check, to check for compatible
     strings used in kernel sources against compatible strings in DT
     schemas.

   - Handle DT_SCHEMA_FILES changes when rebuilding

  DT bindings:

   - LED bindings for MT6370 PMIC

   - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
     mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
     and arm,versatile-sysreg to DT schema format

   - Add nvmem cells to u-boot,env schema

   - Add more LED_COLOR_ID definitions

   - Require 'opp-table' uses to be a node

   - Various schema fixes to match QEMU 'virt' DT usage

   - Tree wide dropping of redundant 'Device Tree Binding' in schema
     titles

   - More (unevaluated|additional)Properties fixes in schema child nodes

   - Drop various redundant minItems equal to maxItems"

* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
  of: base: Shift refcount decrement in of_find_last_cache_level()
  dt-bindings: leds: Add MediaTek MT6370 flashlight
  dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
  dt-bindings: mailbox: Convert mtk-gce to DT schema
  of: base: make of_device_compatible_match() accept const device node
  of: Fix "dma-ranges" handling for bus controllers
  of: fdt: Remove unused struct fdt_scan_status
  dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
  dt-bindings: timer: Add power-domains for TI timer-dm on K3
  dt: Add a check for undocumented compatible strings in kernel
  kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
  dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
  dt-bindings: i2c: migrate mt7621 text bindings to YAML
  dt-bindings: power: gpcv2: correct patternProperties
  dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
  dt-bindings: timer: arm,arch_timer: Allow dual compatible string
  dt-bindings: arm: cpus: Add kryo240 compatible
  dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
  dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
  dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
  ...
</content>
</entry>
<entry>
<title>Merge branch 'pci/qcom'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e302bafff6fa5192c8d7afe8387d7fd2a45ce799'/>
<id>urn:sha1:e302bafff6fa5192c8d7afe8387d7fd2a45ce799</id>
<content type='text'>
- List platforms that use a single MSI host interrupt in qcom DT (Johan
  Hovold)

- Add SC8280XP, SA8540P support to qcom DT binding and driver(Johan Hovold)

- Make all optional clocks truly optional in the driver (Johan Hovold)

- Rename per-IP structs to reflect the IP version (Johan Hovold)

- Sort device ID match table by compatible string (Johan Hovold)

- Add MODULE_DEVICE_TABLE to enable module autoloading (Dmitry Baryshkov)

- Drop the unused .post_deinit() callback (Johan Hovold)

- Rely on DT for clock information instead of hard-coding it in the driver
  (Manivannan Sadhasivam)

- Disable IRQs when removing driver to avoid spurious IRQs later
  (Manivannan Sadhasivam)

- Expose link transition counts via debugfs to help debug issues with
  low-power states (Manivannan Sadhasivam)

- Gate Master AXI clock to the MHI bus while in L1 substates to save power
  (Manivannan Sadhasivam)

- Disable Master AXI clock to save power when there is no traffic on PCIe
  (Manivannan Sadhasivam)

- Make the "PERST separation" debug feature optional in the DT and the
  driver (Manivannan Sadhasivam)

- Define clocks to be per-platform in DT to prepare for future SoCs
  (Manivannan Sadhasivam)

- Add SM8450 SoC support (Manivannan Sadhasivam)

- Check for platform_get_resource_byname() to avoid a NULL pointer
  dereference (Yang Yingliang)

* pci/qcom:
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  PCI: qcom: Rename host-init error label
  PCI: qcom: Drop unused post_deinit callback
  PCI: qcom-ep: Add MODULE_DEVICE_TABLE
  PCI: qcom: Sort device-id table
  PCI: qcom: Clean up IP configurations
  PCI: qcom: Make all optional clocks optional
  PCI: qcom: Add support for SA8540P
  PCI: qcom: Add support for SC8280XP
  dt-bindings: PCI: qcom: Add SA8540P to binding
  dt-bindings: PCI: qcom: Add SC8280XP to binding
  dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
</content>
</entry>
<entry>
<title>dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC</title>
<updated>2022-10-05T22:17:49Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=63e445b746aa466525a483b81581e4798eb2f321'/>
<id>urn:sha1:63e445b746aa466525a483b81581e4798eb2f321</id>
<content type='text'>
Add devicetree bindings support for SM8450 SoC. Only the clocks are
different on this platform, rest is same as SDX55.

Link: https://lore.kernel.org/r/20220914075350.7992-12-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: PCI: qcom-ep: Define clocks per platform</title>
<updated>2022-10-05T22:17:25Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8dffa879ac79ffb6421dd924e74e6d07b0996207'/>
<id>urn:sha1:8dffa879ac79ffb6421dd924e74e6d07b0996207</id>
<content type='text'>
In preparation for adding the bindings for future SoCs, define the
clocks per platform.

Link: https://lore.kernel.org/r/20220914075350.7992-11-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: PCI: qcom-ep: Make PERST separation optional</title>
<updated>2022-10-05T22:16:18Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=299915d6bee257880139528cd3d293707717eca5'/>
<id>urn:sha1:299915d6bee257880139528cd3d293707717eca5</id>
<content type='text'>
PERST separation is an optional debug feature used to collect the crash
dump from the PCIe endpoint devices by the PCIe host when the endpoint
crashes. This feature keeps the PCIe link up by separating the PCIe IP
block from the SoC reset logic.

Remove the corresponding property "qcom,perst-regs" from the required
properties list.

Link: https://lore.kernel.org/r/20220914075350.7992-9-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks</title>
<updated>2022-09-27T09:21:24Z</updated>
<author>
<name>Krishna chaitanya chundru</name>
<email>quic_krichai@quicinc.com</email>
</author>
<published>2022-09-08T08:46:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1abbe04a1b55200d0e3e93b2c15058c15126a225'/>
<id>urn:sha1:1abbe04a1b55200d0e3e93b2c15058c15126a225</id>
<content type='text'>
Add missing aggre0 and aggre1 clocks.

Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
Signed-off-by: Krishna chaitanya chundru &lt;quic_krichai@quicinc.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks</title>
<updated>2022-09-15T02:23:38Z</updated>
<author>
<name>Krishna chaitanya chundru</name>
<email>quic_krichai@quicinc.com</email>
</author>
<published>2022-09-08T08:46:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a672a9f4a6bba31f8dfb3a77714468ddb985ecf7'/>
<id>urn:sha1:a672a9f4a6bba31f8dfb3a77714468ddb985ecf7</id>
<content type='text'>
Add missing aggre0 and aggre1 clocks.

Signed-off-by: Krishna chaitanya chundru &lt;quic_krichai@quicinc.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
</content>
</entry>
<entry>
<title>dt-bindings: Remove 'Device Tree Bindings' from end of title:</title>
<updated>2022-08-25T19:06:57Z</updated>
<author>
<name>Andrew Lunn</name>
<email>andrew@lunn.ch</email>
</author>
<published>2022-08-25T02:04:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dd3cb467ebb5659d6552999d6f16a616653f9933'/>
<id>urn:sha1:dd3cb467ebb5659d6552999d6f16a616653f9933</id>
<content type='text'>
As indicated in
link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/

DT schema files should not have 'Device Tree Binding' as part of there
title: line. Remove this in most .yaml files, so hopefully preventing
developers copying it into new .yaml files, and being asked to remove
it.

Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: PCI: microchip,pcie-host: fix missing dma-ranges</title>
<updated>2022-08-24T11:38:26Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-08-19T23:14:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1a7966b33b5bbefd950cffef1ea8ee3f5f1bf076'/>
<id>urn:sha1:1a7966b33b5bbefd950cffef1ea8ee3f5f1bf076</id>
<content type='text'>
The dma-ranges property was missed when adding the binding initially.
The root port can use up to 6 address translation tables, depending on
configuration.

Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3
Link: https://lore.kernel.org/r/20220819231415.3860210-4-mail@conchuod.ie
Fixes: 6ee6c89aac35 ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding")
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
</feed>
