linux-dev/arch/arc/include/asm/entry-compact.h, branch linus/master

ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only

2021-08-24T21:25:48Z

MMU SCRATCH_DATA0 register is intended to cache task pgd. However in ARC700 SMP port, it has to be repurposed for re-entrant interrupt handling, while UP port doesn't. We currently handle these use-cases using a fabricated #define which has usual issues of dependency nesting and obvious ugliness. So clean this up: for ARC700 don't use to cache pgd (even in UP) and do the opposite for ARCv2. And while here, switch to canonical pgd_offset(). Acked-by: Mike Rapoport Signed-off-by: Vineet Gupta

ARC: [plat-eznps]: Drop support for EZChip NPS platform

2020-10-06T04:02:29Z

NPS customers are no longer doing active development, as evident from rand config build failures reported in recent times, so drop support for NPS platform. Tested-by: kernel test robot Signed-off-by: Vineet Gupta

ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg

2019-10-28T19:12:31Z

ARC700 exception (and intr handling) didn't have auto stack switching thus had to rely on stashing a reg temporarily (to free it up) at a known place in memory, allowing to code up the low level stack switching. This however was not re-entrant in SMP which thus had to repurpose the per-cpu MMU SCRATCH DATA register otherwise used to "cache" the task pdg pointer (vs. reading it from mm struct) The newer HS cores do have auto-stack switching and thus even SMP builds can use the MMU SCRATCH reg as originally intended. This patch fixes the restriction to ARC700 SMP builds only Signed-off-by: Vineet Gupta

ARC: entry: EV_Trap expects r10 (vs. r9) to have exception cause

2019-07-08T08:24:44Z

avoids 1 MOV instruction in light of double load/store code Signed-off-by: Vineet Gupta

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19T15:09:55Z

Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Enrico Weigelt Reviewed-by: Kate Stewart Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman

ARC: [arcompact] entry.S: minor code movement

2018-07-09T18:25:45Z

This is a non functional code changw, which moves r25 restore from macro into the caller of macro Signed-off-by: Vineet Gupta

ARC: [plat-eznps] handle extra aux regs #2: kernel/entry exit

2017-08-28T22:17:36Z

Preserve eflags and gpa1 aux during entry/exit into kernel as these could be modified by kernel mode These registers used by compare exchange instructions. - GPA1 is used for compare value, - EFLAGS got bit reflects atomic operation response. EFLAGS is zeroed for each new user task so it won't get its parent value. Signed-off-by: Liav Rehana Signed-off-by: Noam Camus Signed-off-by: Vineet Gupta

Fix typos

2016-05-30T04:37:32Z

Signed-off-by: Andrea Gelmini Signed-off-by: Vineet Gupta

ARC: [plat-eznps] Use dedicated identity auxiliary register.

2016-05-09T04:02:33Z

With generic "identity" num of CPUs is limited to 256 (8 bit). We use our alternative AUX register GLOBAL_ID (12 bit). Now we can support up to 4096 CPUs. Signed-off-by: Noam Camus

ARC: Fix misspellings in comments.

2016-03-11T09:29:53Z

Signed-off-by: Adam Buchbinder Signed-off-by: Vineet Gupta