linux-dev/arch/arm64/boot/dts/Makefile, branch master

arm64: dts: nuvoton: Add initial NPCM8XX device tree

2022-07-19T13:41:04Z

This adds initial device tree support for the Nuvoton NPCM845 Board Management controller (BMC) SoC family. The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and have various peripheral IPs. Signed-off-by: Tomer Maimon Reviewed-by: Krzysztof Kozlowski Signed-off-by: Arnd Bergmann

arm64: dts: fsd: Add initial device tree support

2022-01-26T09:37:08Z

Add initial device tree support for "Full Self-Driving" (FSD) SoC This SoC contain three clusters of four cortex-a72 CPUs and various peripheral IPs. Cc: linux-fsd@tesla.com Reviewed-by: Krzysztof Kozlowski Signed-off-by: Arjun K V Signed-off-by: Aswani Reddy Signed-off-by: Ajay Kumar Signed-off-by: Sriranjani P Signed-off-by: Chandrasekar R Signed-off-by: Shashank Prashar Signed-off-by: Alim Akhtar Link: https://lore.kernel.org/r/20220124141644.71052-15-alim.akhtar@samsung.com Signed-off-by: Krzysztof Kozlowski

arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree

2021-04-08T11:18:41Z

This currently supports: * SMP (via spin-tables) * AIC IRQs * Serial (with earlycon) * Framebuffer A number of properties are dynamic, and based on system firmware decisions that vary from version to version. These are expected to be filled in by the loader. Reviewed-by: Rob Herring Signed-off-by: Hector Martin

ARM: remove zte zx platform

2021-01-20T09:24:19Z

The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with Baoyou Xie and Shawn Guo subsequently becoming maintainers after the addition of the 64-bit variant. However, the only machines that were ever supported upstream are the reference designs, not actual set-top-box devices that would benefit from this support. All ZTE set-top-boxes from the past few years seem to be based on third-party SoCs. While there is very little information about zx296702 and zx296718 on the web, I found some references to other chips from the same family, such as zx296716 and zx296719, which were never submitted for upstream support. Finally, there is no support for the GPU on either of them, with the lima and panfrost device drivers having been added after work on the zx platform had stopped. Shawn confirmed that he has not seen any interest in this platform for the past four years, and that it can be removed. Thanks to Jun and Shawn for maintaining this platform over the past five years. Cc: Jun Nie Cc: Shawn Guo Signed-off-by: Arnd Bergmann

arm64: dts: visconti: Add device tree for TMPV7708 RM main board

2020-09-23T08:09:17Z

Add basic support for the Visconti TMPV7708 SoC peripherals - - CPU - CA53 x 4 and 2 cluster. - not support PSCI, currently only spin-table is supported. - Interrupt controller (ARM Generic Interrupt Controller) - Timer (ARM architected timer) - UART (ARM PL011 UART controller) - SPI (ARM PL022 SPI controller) - I2C (Synopsys DesignWare APB I2C Controller) - Pin control (Visconti specific) Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal

Merge tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2020-08-04T02:38:30Z

Pull new ARM SoC support from Arnd Bergmann: "There are three SoC families newly dded to the 32-bit and 64-bit Arm architecture code in the kernel this time: - Daniel Palmer adds initial support for two chips made by MStar, a taiwanese SoC manufacturer that became part of Mediatek in 2012. For now, the added support is fairly minimal, with just two of its Cortex-A7 based 32-bit camera chips getting support for a limited set of on-chip peripherals. - Lars Povlsen from Microchip adds support for their new Sparx5 family of ethernet switch chips using 64-bit Cortex-A53 cores. These are descended from earlier VSC7xxx SparX and Ocelot chips using 32-bit MIPS cores. - Daniele Alessandrelli from Intel adds support for the new Keem Bay SoC for computer vision, built around a Movidius VPU with Linux running on Arm Cortex-A53 cores" * tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits) ARM: mstar: Correct the compatible string for pmsleep dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep ARM: mstar: Add reboot support ARM: mstar: Add "pmsleep" node to base dtsi ARM: mstar: Add PMU ARM: mstar: Adjust IMI size for infinity3 ARM: mstar: Adjust IMI size for mercury5 ARM: mstar: Adjust IMI size of infinity ARM: mstar: Add IMI SRAM region dt-bindings: arm: mstar: Move existing MStar binding descriptions dt-bindings: arm: mstar: Add binding details for mstar, pmsleep ARM: mstar: Fix dts filename for 70mai midrive d08 ARM: mstar: Add dts for 70mai midrive d08 ARM: mstar: Add dts for msc313(e) based BreadBee boards ARM: mstar: Add mercury5 series dtsis ARM: mstar: Add infinity/infinity3 family dtsis ARM: mstar: Add Armv7 base dtsi ARM: mstar: Add binding details for mstar,l3bridge ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs ...

arm64: dts: amazon: rename al folder to be amazon

2020-07-24T13:54:01Z

As preparation to add device tree binding for Amazon's Annapurna Labs Alpine v3 support. Rename al device tree folder to be amazon. Link: https://lore.kernel.org/r/20200724132654.16549-3-hhhawa@amazon.com Signed-off-by: Hanna Hawa Acked-by: Antoine Tenart Signed-off-by: Arnd Bergmann

arm64: dts: sparx5: Add basic cpu support

2020-07-22T20:28:38Z

This adds the basic DT structure for the Microchip Sparx5 SoC, and the reference boards, pcb125, pcb134 and pcb135. The two latter have a NAND vs a eMMC centric variant (as a mount option). Link: https://lore.kernel.org/r/20200615133242.24911-4-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni Signed-off-by: Lars Povlsen Signed-off-by: Arnd Bergmann

arm64: dts: agilex: Add initial support for Intel's Agilex SoCFPGA

2019-04-05T21:36:07Z

Add the initial device tree files for Intel's Agilex SoCFPGA platform. Signed-off-by: Dinh Nguyen

arm64: dts: bitmain: Add BM1880 SoC support

2019-02-09T10:40:07Z

Add devicetree support for Bitmain BM1880 SoC, consisting of a Dual core ARM Cortex A53 subsystem, a Single core RISC-V subsystem and a Tensor Processor subsystem. Only ARM Cortex A53 Application processor subsystem support is enabled for now. Signed-off-by: Manivannan Sadhasivam Acked-by: Arnd Bergmann