<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/arm64/boot/dts/allwinner, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/allwinner?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/allwinner?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-08T20:05:27Z</updated>
<entry>
<title>arm64: dts: allwinner: beelink-gs1: Enable GPU OPP</title>
<updated>2022-09-08T20:05:27Z</updated>
<author>
<name>Clément Péron</name>
<email>peron.clem@gmail.com</email>
</author>
<published>2022-09-06T15:30:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a684aa3830f547bb698c524b11c89e3f24433c1f'/>
<id>urn:sha1:a684aa3830f547bb698c524b11c89e3f24433c1f</id>
<content type='text'>
Enable GPU OPP table for Beelink GS1.

Signed-off-by: Clément Péron &lt;peron.clem@gmail.com&gt;
Acked-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220906153034.153321-6-peron.clem@gmail.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: h6: Add GPU OPP table</title>
<updated>2022-09-08T20:04:48Z</updated>
<author>
<name>Clément Péron</name>
<email>peron.clem@gmail.com</email>
</author>
<published>2022-09-06T15:30:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=116745dd557b85e32adc9e1aa8b7d5c5079aba1b'/>
<id>urn:sha1:116745dd557b85e32adc9e1aa8b7d5c5079aba1b</id>
<content type='text'>
Add an Operating Performance Points table for the GPU to
enable Dynamic Voltage &amp; Frequency Scaling on the H6.

The voltage range is set with minimal voltage set to the target
and the maximal voltage set to 1.2V. This allow DVFS framework to
work properly on board with fixed regulator.

Signed-off-by: Clément Péron &lt;peron.clem@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220906153034.153321-4-peron.clem@gmail.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: h6: Add cooling map for GPU</title>
<updated>2022-09-08T20:04:15Z</updated>
<author>
<name>Clément Péron</name>
<email>peron.clem@gmail.com</email>
</author>
<published>2022-09-06T15:30:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a067916d20bd52bd7c13af02bda1eb4f93e68539'/>
<id>urn:sha1:a067916d20bd52bd7c13af02bda1eb4f93e68539</id>
<content type='text'>
Add a simple cooling map for the GPU.

This cooling map come from the vendor kernel 4.9 with a
2°C hysteresis added.

Signed-off-by: Clément Péron &lt;peron.clem@gmail.com&gt;
Acked-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220906153034.153321-3-peron.clem@gmail.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: a100: Add I2C DMA requests</title>
<updated>2022-09-08T20:00:34Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-08-30T02:08:24Z</published>
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<id>urn:sha1:5db5663cdf369b3575dae464cdcda0233ab19f44</id>
<content type='text'>
The I2C controllers in the A100 SoC are all connected to the DMA engine.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220830020824.62288-4-samuel@sholland.org
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: a100: Add device node for DMA controller</title>
<updated>2022-09-08T20:00:07Z</updated>
<author>
<name>Yangtao Li</name>
<email>frank@allwinnertech.com</email>
</author>
<published>2022-08-30T02:08:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7072784d97b2b140a9e5507a29fcbc9b70dfc343'/>
<id>urn:sha1:7072784d97b2b140a9e5507a29fcbc9b70dfc343</id>
<content type='text'>
The A100 SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals.

Add a device node for it.

Signed-off-by: Yangtao Li &lt;frank@allwinnertech.com&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220830020824.62288-3-samuel@sholland.org
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: h616: Add X96 Mate TV box support</title>
<updated>2022-07-09T18:08:53Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2022-07-08T10:52:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2c1e62992981c4d8fe7bc183877aec2a189bd387'/>
<id>urn:sha1:2c1e62992981c4d8fe7bc183877aec2a189bd387</id>
<content type='text'>
The X96 Mate is an Allwinner H616 based TV box, featuring:
  - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
  - 2GiB/4GiB RAM (fully usable!)
  - 16/32/64GiB eMMC
  - 100Mbps Ethernet (via embedded AC200 EPHY, not yet supported)
  - Unsupported Allwinner WiFi chip
  - 2 x USB 2.0 host ports
  - HDMI port
  - IR receiver
  - 5V/2A DC power supply via barrel plug

Add a basic devicetree for it, with SD card and eMMC working, as
well as serial and the essential peripherals, like the AXP PMIC.

This DT is somewhat minimal, and should work on many other similar TV
boxes with the Allwinner H616 chip.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Samuel Holland &lt;samuel@sholland.org&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220708105235.3983266-8-andre.przywara@arm.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support</title>
<updated>2022-07-09T18:08:53Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2022-07-08T10:52:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5a378f9f2b15a2aa3b7485e46c3d300103ea384b'/>
<id>urn:sha1:5a378f9f2b15a2aa3b7485e46c3d300103ea384b</id>
<content type='text'>
The OrangePi Zero 2 is a development board with the new H616 SoC. It
comes with the following features:
  - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
  - 512MiB/1GiB DDR3 DRAM
  - AXP305 PMIC
  - Raspberry-Pi-1 compatible GPIO header
  - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
  - 1 USB 2.0 host port
  - 1 USB 2.0 type C port (power supply + OTG)
  - MicroSD slot
  - on-board 2MiB bootable SPI NOR flash
  - 1Gbps Ethernet port (via RTL8211F PHY)
  - micro-HDMI port
  - (yet) unsupported Allwinner WiFi/BT chip

Add the devicetree file describing the currently supported features.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Samuel Holland &lt;samuel@sholland.org&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220708105235.3983266-7-andre.przywara@arm.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: Add Allwinner H616 .dtsi file</title>
<updated>2022-07-09T18:08:53Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2022-07-08T10:52:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0d17c865118881609ea7e381c7cadbb7979cc596'/>
<id>urn:sha1:0d17c865118881609ea7e381c7cadbb7979cc596</id>
<content type='text'>
This (relatively) new SoC is similar to the H6, but drops the (broken)
PCIe support and the USB 3.0 controller. It also gets the management
controller removed, which in turn removes *some*, but not all of the
devices formerly dedicated to the ARISC (CPUS).
And while there is still the extra sunxi interrupt controller, the
package lacks the corresponding NMI pin, so no interrupts for the PMIC.

The reserved memory node is actually handled by Trusted Firmware now,
but U-Boot fails to propagate this to a separately loaded DTB, so we
keep it in here for now, until U-Boot learns to do this properly.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Samuel Holland &lt;samuel@sholland.org&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220708105235.3983266-4-andre.przywara@arm.com
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: pinephone: Enable internal HMIC bias</title>
<updated>2022-07-08T16:52:08Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-21T03:54:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=aab941b8c3cfb020baf2218e9e39706e05bf4877'/>
<id>urn:sha1:aab941b8c3cfb020baf2218e9e39706e05bf4877</id>
<content type='text'>
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external
resistor connecting HBIAS to MIC2P. Enable the internal resistor to
provide the necessary headeset microphone bias.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220621035452.60272-4-samuel@sholland.org
</content>
</entry>
<entry>
<title>arm64: dts: allwinner: a100: Update I2C controller fallback</title>
<updated>2022-07-05T19:49:30Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-07-02T05:25:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=790edb2eae0a90033e5b362830717eeda42c985a'/>
<id>urn:sha1:790edb2eae0a90033e5b362830717eeda42c985a</id>
<content type='text'>
The I2C controllers in the A100 SoC are newer-generation hardware
which includes an offload engine. Signify that by including the
allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first
SoC with this generation of I2C controller.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
Link: https://lore.kernel.org/r/20220702052544.31443-2-samuel@sholland.org
</content>
</entry>
</feed>
