linux-dev/arch/arm64/boot/dts/exynos, branch master

Merge tag 'samsung-dt-dt64-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

2022-10-04T20:43:32Z

Samsung DTS ARM and ARM64 changes for v6.1 Late cleanup and fixes for Samsung DTS: 1. Fix polarity of pins: - enable GPIO of NFC chip in Exynos5433 TM2 boards, - vbus GPIO of EHCI in Exynos4412 Origen board. 2. Correct name of pin configuration nodes - redundant "pins" in the name (no functional impact). * tag 'samsung-dt-dt64-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: correct double "pins" in pinmux node ARM: dts: exynos: fix polarity of VBUS GPIO of Origen arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2 Link: https://lore.kernel.org/r/20221003073916.12588-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2

2022-09-30T12:23:33Z

According to s3fwrn5 driver code the "enable" GPIO line is driven "high" when chip is not in use (mode is S3FWRN5_MODE_COLD), and is driven "low" when chip is in use. s3fwrn5_phy_power_ctrl(): ... gpio_set_value(phy->gpio_en, 1); ... if (mode != S3FWRN5_MODE_COLD) { msleep(S3FWRN5_EN_WAIT_TIME); gpio_set_value(phy->gpio_en, 0); msleep(S3FWRN5_EN_WAIT_TIME); } Therefore the line described by "en-gpios" property should be annotated as "active low". The wakeup gpio appears to have correct polarity (active high). Signed-off-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20220929011557.4165216-1-dmitry.torokhov@gmail.com Signed-off-by: Krzysztof Kozlowski

arm64: dts: exynos: Add SysMMU nodes for Exynos850

2022-08-23T07:21:35Z

Add all SysMMU nodes to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220809113323.29965-10-semen.protsenko@linaro.org

arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850

2022-08-23T07:21:34Z

Add missing clock domains to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220809113323.29965-9-semen.protsenko@linaro.org

arm64: dts: exynosautov9: add fsys0/1 clock DT nodes

2022-08-23T07:21:34Z

Add cmu_fsys0 and cmu_fsys1 for PCIe clocks and USB/MMC clocks respectively. Signed-off-by: Chanho Park Reviewed-by: Chanwoo Choi [krzk: put nodes ordered by unit address] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/50f8145bca30cf5c900359d0b78c1c617090e021.1659054220.git.chanho61.park@samsung.com

Merge tag 'samsung-dt64-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

2022-07-07T08:22:50Z

Samsung DTS ARM64 changes for v5.20, part two 1. Correct SPI11 pin names on ExynosAutov9. 2. Add more USI (I2C/SPI/UART) devices to ExynosAutov9. * tag 'samsung-dt64-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynosautov9: add usi device tree nodes arm64: dts: exynosautov9: prepare usi0 changes arm64: dts: exynosautov9: add pdma0 device tree node dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible arm64: dts: exynosautov9: correct spi11 pin names Link: https://lore.kernel.org/r/20220707080408.69251-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

arm64: dts: exynosautov9: add usi device tree nodes

2022-07-05T10:34:36Z

Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = ; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com

arm64: dts: exynosautov9: prepare usi0 changes

2022-07-05T10:34:36Z

Before adding whole USI nodes, this applies the changes of usi0 in advance. To be the usi0 and serian_0 nodes as SoC default, some properties should be moved to exynosautov9-sadk.dts. Signed-off-by: Chanho Park Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com

arm64: dts: exynosautov9: add pdma0 device tree node

2022-07-05T10:34:36Z

Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com

arm64: dts: exynosautov9: correct spi11 pin names

2022-07-05T10:30:19Z

They should be started with "gpp5-". Fixes: 31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC") Signed-off-by: Chanho Park Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220627005832.8709-1-chanho61.park@samsung.com