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<title>linux-dev/arch/arm64/boot/dts/qcom, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/qcom?h=linus%2Fmaster</id>
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<updated>2022-06-03T18:17:49Z</updated>
<entry>
<title>Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb</title>
<updated>2022-06-03T18:17:49Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-06-03T18:17:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=54c2cc79194c961a213c1d375fe3aa4165664cc4'/>
<id>urn:sha1:54c2cc79194c961a213c1d375fe3aa4165664cc4</id>
<content type='text'>
Pull USB / Thunderbolt updates from Greg KH:
 "Here is the "big" set of USB and Thunderbolt driver changes for
  5.18-rc1. For the most part it's been a quiet development cycle for
  the USB core, but there are the usual "hot spots" of development
  activity.

  Included in here are:

   - Thunderbolt driver updates:
       - fixes for devices without displayport adapters
       - lane bonding support and improvements
       - other minor changes based on device testing

   - dwc3 gadget driver changes.

     It seems this driver will never be finished given that the IP core
     is showing up in zillions of new devices and each implementation
     decides to do something different with it...

   - uvc gadget driver updates as more devices start to use and rely on
     this hardware as well

   - usb_maxpacket() api changes to remove an unneeded and unused
     parameter.

   - usb-serial driver device id updates and small cleanups

   - typec cleanups and fixes based on device testing

   - device tree updates for usb properties

   - lots of other small fixes and driver updates.

  All of these have been in linux-next for weeks with no reported
  problems"

* tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits)
  USB: new quirk for Dell Gen 2 devices
  usb: dwc3: core: Add error log when core soft reset failed
  usb: dwc3: gadget: Move null pinter check to proper place
  usb: hub: Simplify error and success path in port_over_current_notify
  usb: cdns3: allocate TX FIFO size according to composite EP number
  usb: dwc3: Fix ep0 handling when getting reset while doing control transfer
  usb: Probe EHCI, OHCI controllers asynchronously
  usb: isp1760: Fix out-of-bounds array access
  xhci: Don't defer primary roothub registration if there is only one roothub
  USB: serial: option: add Quectel BG95 modem
  USB: serial: pl2303: fix type detection for odd device
  xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI
  xhci: Remove quirk for over 10 year old evaluation hardware
  xhci: prevent U2 link power state if Intel tier policy prevented U1
  xhci: use generic command timer for stop endpoint commands.
  usb: host: xhci-plat: omit shared hcd if either root hub has no ports
  usb: host: xhci-plat: prepare operation w/o shared hcd
  usb: host: xhci-plat: create shared hcd after having added main hcd
  xhci: prepare for operation w/o shared hcd
  xhci: factor out parts of xhci_gen_setup()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-05-26T17:28:12Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-05-26T17:28:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ae862183285cbb2ef9032770d98ffa9becffe9d5'/>
<id>urn:sha1:ae862183285cbb2ef9032770d98ffa9becffe9d5</id>
<content type='text'>
Pull ARM DT updates from Arnd Bergmann:
 "There are 40 branches this time, adding a lot of new hardware support,
  and cleanups. Krzysztof Kozlowski continues his treewide cleanups.

  There are a number of new SoCs, all of them as part of existing
  families, and typically added along with a reference board:

   - Renesas RZ/G2UL (R9A07G043) is the single-core version of the
     RZ/G2L general-purpose MPU.

   - Renesas RZ/V2M (R9A09G011) is a smart camera SoC

   - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
     cores and deep learning accerlation.

   - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
     and dual Wifi-6.

   - Corstone1000 is a generic platform from Arm that is used for
     designing custom SoCs, the support for now is for the Fixed Virtual
     Platform emulation for it.

   - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
     upcoming Chromebooks.

   - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
     MMU-less SoC to be added in a while

  New machines based on already supported SoCs this time are mainly for
  32-bit platforms and include:

   - Two wireless routers based on Broadcom bcm4708

   - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
     for the industrial embedded market, and on NXP LS1021A based IOT
     board.

   - Two ethernet switches based on Microchip LAN966

   - Eight Qualcomm Snapdragon based machines, including a smartwatch, a
     Chromebook board and some phones

   - Another phone based on the old ST-Ericsson Ux500 platform

   - Seven STM32MP1 based boards

   - Four single-board computers based on Rockchip RK3566/RK3568"

* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
  ARM: dts: kswitch-d10: enable networking
  ARM: dts: lan966x: add switch node
  ARM: dts: lan966x: add serdes node
  ARM: dts: lan966x: add reset switch reset node
  ARM: dts: lan966x: add MIIM nodes
  ARM: dts: lan966x: add hwmon node
  ARM: dts: lan966x: add basic Kontron KSwitch D10 support
  ARM: dts: lan966x: add flexcom I2C nodes
  ARM: dts: lan966x: add flexcom SPI nodes
  ARM: dts: lan966x: add all flexcom usart nodes
  ARM: dts: lan966x: add missing uart DMA channel
  ARM: dts: lan966x: add sgpio node
  ARM: dts: lan966x: swap dma channels for crypto node
  ARM: dts: lan966x: rename pinctrl nodes
  ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
  ARM: dts: at91: use generic node name for dataflash
  ARM: dts: turris-omnia: Add atsha204a node
  arm64: dts: mt8192: Follow binding order for SCP registers
  arm64: dts: mediatek: add mtk-snfi for mt7622
  arm64: dts: mediatek: mt8195-demo: enable uart1
  ...
</content>
</entry>
<entry>
<title>Merge tag 'qcom-arm64-fixes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes</title>
<updated>2022-05-09T21:16:40Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2022-05-09T21:16:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e81c07e25e5b8240f95ed9be5108b8f3455225cf'/>
<id>urn:sha1:e81c07e25e5b8240f95ed9be5108b8f3455225cf</id>
<content type='text'>
Qualcomm ARM64 DT fixes for v5.18

This disables the two Soundwire controllers as well as rx and tx macros
by default on the SM8250 platform to avoid crashes on devices where
these aren't available.

* tag 'qcom-arm64-fixes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: sm8250: don't enable rx/tx macro by default

Link: https://lore.kernel.org/r/20220509152310.306179-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi</title>
<updated>2022-05-06T03:42:27Z</updated>
<author>
<name>Stephen Boyd</name>
<email>swboyd@chromium.org</email>
</author>
<published>2022-04-27T02:03:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=19794489fa2474a55c00848e00ca3d15ea01d36c'/>
<id>urn:sha1:19794489fa2474a55c00848e00ca3d15ea01d36c</id>
<content type='text'>
The SoC is always present on sc7180-trogdor.dtsi and thus we should
include it in the "generic" dtsi file for trogdor. Previously we had
removed it from there because we had to do the spi6/spi0 swizzle, so
each trogdor variant board had to include sc7180.dtsi and then
sc7180-trogdor.dtsi so that the latter dtsi file could modify the right
spi bus for EC and H1 properties that are common to all trogdor boards.

Now that we're done with that we can replace sc7180.dtsi includes with
sc7180-trogdor.dtsi and include sc7180.dtsi in sc7180-trogdor.dtsi as
was originally intended. We still need to include sc7180-trogdor.dtsi
before the bridge dtsi files though because those rely on the panel
label.

Cc: "Joseph S. Barrera III" &lt;joebar@chromium.org&gt;
Cc: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220427020339.360855-4-swboyd@chromium.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling</title>
<updated>2022-05-06T03:42:27Z</updated>
<author>
<name>Stephen Boyd</name>
<email>swboyd@chromium.org</email>
</author>
<published>2022-04-27T02:03:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d277cab7afc7b54ea91808c0895d78c2021af534'/>
<id>urn:sha1:d277cab7afc7b54ea91808c0895d78c2021af534</id>
<content type='text'>
We had to do this spi0/spi6 flip-flop on trogdor-r0 because the spi
buses got swizzled between r0 and r1. The swizzle stopped after r1, but
we kept this around to support either hardware possibility and to keep
trogdor-r0 working.

trogdor-r0 isn't supported upstream, so this swizzle is not doing
anything besides making a pattern that others tryt  to copy for the EC and
H1 nodes. Let's remove it and simplify the dts files.

Cc: "Joseph S. Barrera III" &lt;joebar@chromium.org&gt;
Cc: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220427020339.360855-3-swboyd@chromium.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling</title>
<updated>2022-05-06T03:42:27Z</updated>
<author>
<name>Stephen Boyd</name>
<email>swboyd@chromium.org</email>
</author>
<published>2022-04-27T02:03:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=51d30402be7506db007af6d29c6bc7c1cefcc82f'/>
<id>urn:sha1:51d30402be7506db007af6d29c6bc7c1cefcc82f</id>
<content type='text'>
Trogdor boards with a detachable keyboard don't have a trackpad over
i2c. Instead the trackpad is on the detachable keyboard base. Let's move
the enabling of the trackpad i2c bus out of the base sc7180-trogdor.dtsi
file so that each trogdor board that is detachable, of which there are
many, doesn't have to disable the trackpad bus.

Cc: "Joseph S. Barrera III" &lt;joebar@chromium.org&gt;
Cc: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220427020339.360855-2-swboyd@chromium.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sc7280: eDP for herobrine boards</title>
<updated>2022-05-06T03:36:26Z</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2022-04-26T19:41:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=366a0a194b3b3e3e52bc7b7b1ac35b40a1187902'/>
<id>urn:sha1:366a0a194b3b3e3e52bc7b7b1ac35b40a1187902</id>
<content type='text'>
Add eDP support to herobrine boards, splitting up amongst the
different files as makes sense. Rationale for the current split of
things:
* The eDP connector itself is on qcard. However, not all devices with
  a qcard will use an eDP panel. Some might use MIPI and, presumably,
  someone could build a device with qcard that had no display at all.
* The qcard provides a PWM for backlight that goes to the eDP
  connector. This PWM is also provided to the board and it's expected
  that it would be used as the backlight PWM even for herobrine
  devices with MIPI displays.
* It's currently assumed that all herobrine boards will have some sort
  of display, either MIPI or eDP (but not both).
* We will assume herobrine-rev1 has eDP. The schematics allow for a
  MIPI panel to be hooked up but, aside from some testing, nobody is
  doing this and most boards don't have all the parts stuffed for
  it. The two panels would also share a PWM for backlight, which is
  weird.
* herobrine-villager and herobrine-hoglin (crd) also have eDP.
* herobrine-hoglin (crd) has slightly different regulator setup for
  the backlight. It's expected that this is unique to this board. See
  comments in the dts file.
* There are some regulators that are defined in the qcard schematic
  but provided by the board like "vreg_edp_bl" and
  "vreg_edp_3p3". While we could put references to these regulators
  straight in the qcard.dtsi file, this would force someone using
  qcard that didn't provide those regulators to provide a dummy or do
  an ugly /delete-node/. Instead, we'll add references in
  herobrine.dtsi.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220426124053.v2.1.Iedd71976a78d53c301ce0134832de95a989c9195@changeid
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sa8155p-adp: Disable multiple Tx and Rx queues for ethernet IP</title>
<updated>2022-05-06T03:11:09Z</updated>
<author>
<name>Bhupesh Sharma</name>
<email>bhupesh.sharma@linaro.org</email>
</author>
<published>2022-04-23T19:50:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=11a3f3dc2cf8d6127aae6183a69dcf3dde026305'/>
<id>urn:sha1:11a3f3dc2cf8d6127aae6183a69dcf3dde026305</id>
<content type='text'>
Fix the issues seen with ethernet traffic getting stalled on SA8155p-ADP
board with default (or larger) mtu size of 1500 bytes, by disabling
multiple Tx and Rx queues for the stmmac IP block.

With the single queue setup, the ethernet traffic is stable,
wget / curl can work well on the board and no ethernet stall is
observed even when longer netperf / iperf3 test are run. Also
a performance of ~940 Mbits/sec is observed on the 1G link, so
there is no observable degradation in performance as well.

Fixes: c5cb42cc8411 ("arm64: dts: qcom: sa8155p-adp: Enable ethernet node")
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220423195003.353150-1-bhupesh.sharma@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sm8150: Fix iommu sid value for SDC2 controller</title>
<updated>2022-05-06T03:10:07Z</updated>
<author>
<name>Bhupesh Sharma</name>
<email>bhupesh.sharma@linaro.org</email>
</author>
<published>2022-04-22T21:06:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9583009097c8933a30110097d373a09624cb8c37'/>
<id>urn:sha1:9583009097c8933a30110097d373a09624cb8c37</id>
<content type='text'>
Fix the IOMMU sid value for SDC2 controller, to ensure that no
ADMA error is observed when the microSD card is detected on the
SA8155p-ADP board.

Fixes: 876644c76034 ("arm64: dts: qcom: sm8150: Add support for SDC2")
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220422210611.173842-1-bhupesh.sharma@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: align DWC3 USB interrupts with DT schema</title>
<updated>2022-05-05T20:06:44Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-05-04T13:19:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4a7ffc10d19555d75aefb686fd5d91509b3f6f01'/>
<id>urn:sha1:4a7ffc10d19555d75aefb686fd5d91509b3f6f01</id>
<content type='text'>
Align order of interrupts with Qualcomm DWC3 USB DT schema.  No
functional impact expected.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20220504131923.214367-14-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
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