<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/arm64/boot/dts/qcom, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/qcom?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/qcom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-06T18:13:04Z</updated>
<entry>
<title>Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-10-06T18:13:04Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-06T18:13:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7171a8da00035e7913c3013ca5fb5beb5b8b22f0'/>
<id>urn:sha1:7171a8da00035e7913c3013ca5fb5beb5b8b22f0</id>
<content type='text'>
Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the changes fall into one of three categories: adding support
  for additional devices on existing machines, cleaning up issues found
  by the ongoing conversion to machine-readable bindings, and addressing
  minor mistakes in the existing DT data.

  Across SoC vendors, Qualcomm and Freescale stick out as getting the
  most updates, which corresponds to their dominance in the mobile phone
  and embedded industrial markets, respectively.

  There are 636 non-merge changeset in this branch, which is a little
  lower than most times, but more importantly we only add 36 machine
  files, which is about half of what we had the past few releases.

  Eight new SoCs are added, but all of them are variations of already
  supported SoC families, and most of them come with one reference board
  design from the SoC vendor:

   - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
     MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
     cores.

   - TI AM62A is another member of the K3 family with Cortex-A53 cores,
     this one is targetted at Video/Vision processing for industrial and
     automotive applications.

   - NXP i.MX8DXL is another chip for this market in the ever-growing
     i.MX8 family, this one again with two Cortex-A35 cores.

   - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
     minor updates of R8A77951 and R8A77980, respectively.

   - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
     IPQ8064 chip, with minimally different features.

  The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
  this time, but in the end did not make the cut.

  The new machines based on existing SoC support are fairly uneventful:

   - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
     Snapdragon 8 Gen 1.

   - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
     Grand Max. These are added for both 32-bit and 64-bit kernels, as
     they originally shipped running 32-bit code.

   - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
     Mitchell

   - Three new machines based on Rockchips RK3399 and RK3566: Anberic
     RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab

   - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
     i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board

   - Two development boards in the Microchip AT91 family: SAMA5D3-EDS
     and lan966x-pcb8290.

   - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
     Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"

* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
  Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
  ARM: dts: s5pv210: correct double "pins" in pinmux node
  ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
  arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
  arm64: dts: uniphier: Add L2 cache node
  arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
  arm64: dts: uniphier: Fix opp-table node name for LD20
  arm64: dts: uniphier: Add USB-device support for PXs3 reference board
  arm64: dts: uniphier: Add ahci controller nodes for PXs3
  arm64: dts: uniphier: Use GIC interrupt definitions
  arm64: dts: uniphier: Rename gpio-hog nodes
  arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
  ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
  ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
  ARM: dts: uniphier: Add ahci controller nodes for PXs2
  ARM: dts: uniphier: Add ahci controller nodes for Pro4
  ARM: dts: uniphier: Use GIC interrupt definitions
  ARM: dts: uniphier: Rename gpio-hog node
  ...
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sc7280: Add required-opps for USB</title>
<updated>2022-09-16T19:09:02Z</updated>
<author>
<name>Rajendra Nayak</name>
<email>quic_rjendra@quicinc.com</email>
</author>
<published>2022-09-16T10:31:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3d59187efc982bf20309ae2fb8514007f9bf2b4e'/>
<id>urn:sha1:3d59187efc982bf20309ae2fb8514007f9bf2b4e</id>
<content type='text'>
USB has a requirement to put a performance state vote on 'cx'
while active. Use 'required-opps' to pass this information from
device tree, and since all the GDSCs in GCC (including USB) are
sub-domains of cx, we also add cx as a power-domain for GCC.
Now when any of the consumers of the GDSCs (in this case USB)
votes on a perforamance state, genpd framework can identify that
the GDSC itself does not support a performance state and it
then propogates the vote to the parent, which in this case is cx.

This change would also mean that any GDSC in GCC thats left enabled
during low power state (perhaps because its marked with a
ALWAYS_ON flag) can prevent the system from entering low power
since that would prevent cx from transitioning to low power.
Ideally any consumers that would need to have their devices
(partially) powered to support wakeups should look at making the
resp. GDSCs transtion to a Retention (PWRSTS_RET) state instead
of leaving them ALWAYS_ON.

Signed-off-by: Rajendra Nayak &lt;quic_rjendra@quicinc.com&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220916103124.30581-1-quic_rjendra@quicinc.com
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sm8350: fix UFS PHY serdes size</title>
<updated>2022-09-16T18:55:36Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-09-16T09:36:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=40e9541959100e017533e18e44d07eed44f91dc5'/>
<id>urn:sha1:40e9541959100e017533e18e44d07eed44f91dc5</id>
<content type='text'>
The size of the UFS PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).

Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220916093603.24263-1-johan+linaro@kernel.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sm8450: fix UFS PHY serdes size</title>
<updated>2022-09-15T18:45:43Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-09-15T14:34:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=677920072e9d757ae158d66b8fdb695992bb3f1a'/>
<id>urn:sha1:677920072e9d757ae158d66b8fdb695992bb3f1a</id>
<content type='text'>
The size of the UFS PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).

Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220915143431.19842-2-johan+linaro@kernel.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size</title>
<updated>2022-09-15T15:10:53Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-09-15T14:34:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ed22cc93abae68f9d3fc4957c20a1d902cf28882'/>
<id>urn:sha1:ed22cc93abae68f9d3fc4957c20a1d902cf28882</id>
<content type='text'>
The size of the PCIe PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).

Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220915143431.19842-1-johan+linaro@kernel.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs</title>
<updated>2022-09-15T02:24:25Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-09-08T08:10:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=aa510b0c1fa34338babbde366b2c98b9b39aa282'/>
<id>urn:sha1:aa510b0c1fa34338babbde366b2c98b9b39aa282</id>
<content type='text'>
The Qualcomm PMIC GPIO bindings require gpio-ranges property:

  qcom/sa8295p-adp.dtb: pmic@8: gpio@c000: 'gpio-ranges' is a required property

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220908081050.29751-5-krzysztof.kozlowski@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs</title>
<updated>2022-09-15T02:24:25Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-09-08T08:10:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=afa774bc17e607ef98cc660657cf5208a39591a2'/>
<id>urn:sha1:afa774bc17e607ef98cc660657cf5208a39591a2</id>
<content type='text'>
Bindings require all PMIC GPIO nodes to have two compatibles - specific
followed by SPMI or SSBI fallback:

  qcom/sa8295p-adp.dtb: pmic@8: gpio@c000:compatible: ['qcom,pm8150-gpio'] is too short

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220908081050.29751-4-krzysztof.kozlowski@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema</title>
<updated>2022-09-15T02:24:25Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-09-08T08:10:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b94d7c1fc7c6ac4e2ce83e9fc6a84fc3034b631c'/>
<id>urn:sha1:b94d7c1fc7c6ac4e2ce83e9fc6a84fc3034b631c</id>
<content type='text'>
Bindings expect PMIC GPIO pin configuration nodes to be named with
'-state' suffix:

  qcom/msm8996-xiaomi-scorpio.dtb: pmic@0: gpio@c000: 'irled-default', 'keypad-default' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

Drop also additional indentation via "pinconf" to make the code a bit
smaller.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220908081050.29751-3-krzysztof.kozlowski@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings</title>
<updated>2022-09-15T02:24:24Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-09-08T08:10:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=308ff92e77aa2febec9b81b6917ebb0f38da8cb5'/>
<id>urn:sha1:308ff92e77aa2febec9b81b6917ebb0f38da8cb5</id>
<content type='text'>
Bindings expect resin node to be named "resin":

  qcom/msm8992-msft-lumia-octagon-talkman.dtb: pmic@0: pon@800: Unevaluated properties are not allowed ('volwnkey' was unexpected)

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220908081050.29751-2-krzysztof.kozlowski@linaro.org
</content>
</entry>
<entry>
<title>arm64: dts: qcom: pmi8994: add missing MPP compatible fallback</title>
<updated>2022-09-15T02:24:24Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-09-08T08:10:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8cd012f75178c4dffe8df692aa991e829286a8d4'/>
<id>urn:sha1:8cd012f75178c4dffe8df692aa991e829286a8d4</id>
<content type='text'>
Bindings require usage of generic MPP fallback in compatible:

  qcom/apq8094-sony-xperia-kitakami-karin_windy.dtb: pmic@2: mpps@a000:compatible: ['qcom,pmi8994-mpp'] is too short

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20220908081050.29751-1-krzysztof.kozlowski@linaro.org
</content>
</entry>
</feed>
