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<title>linux-dev/arch/arm64/boot/dts/socionext, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/arm64/boot/dts/socionext?h=linus%2Fmaster</id>
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<updated>2021-04-22T22:08:35Z</updated>
<entry>
<title>arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E</title>
<updated>2021-04-22T22:08:35Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-04-22T17:31:49Z</published>
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<id>urn:sha1:dcabb06bf127b3e0d3fbc94a2b65dd56c2725851</id>
<content type='text'>
UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.

After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Fixes: c73730ee4c9a ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy</title>
<updated>2020-07-10T01:33:28Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-07-08T08:56:18Z</published>
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<id>urn:sha1:e6bd81a2290f03db8baf761d06071f269dc8e177</id>
<content type='text'>
This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Rename ethphy node to ethernet-phy</title>
<updated>2020-07-10T01:33:14Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-07-08T08:54:11Z</published>
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<id>urn:sha1:dcd54fa89ccdba90cb79ab49c01263c3ceb8d683</id>
<content type='text'>
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: give fixed port number to support card serial</title>
<updated>2020-07-07T10:45:11Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-07-07T10:33:22Z</published>
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<id>urn:sha1:cde5a9ebbd38ad03f98adb57671f24f0bf57b8e4</id>
<content type='text'>
Add this to the aliases node to make it more convenient.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: add interrupts to support card serial</title>
<updated>2020-07-07T09:37:04Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-06-23T11:46:12Z</published>
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<id>urn:sha1:2b1b1267080fe822789d0845a58ebb452724736b</id>
<content type='text'>
Since commit e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.

Since then, 'make ARCH=arm64 dtbs_check' is so noisy because the
required property 'interrupts' is missing.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Add support for Akebi96</title>
<updated>2020-05-04T01:07:35Z</updated>
<author>
<name>Masami Hiramatsu</name>
<email>masami.hiramatsu@linaro.org</email>
</author>
<published>2020-04-30T13:25:13Z</published>
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<id>urn:sha1:7d5620d31ecc8d19f6e4ad73196955ec0bb4a507</id>
<content type='text'>
Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhir LD20.
( https://www.96boards.org/product/akebi96/ )

This board has;
- MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
- Simple frame buffer with 1080p fixed resolution.
- I2S port which is connected to aout1b instead of aout1.
- 3 serial ports, only serial3 has CTS/RTS.
- No NAND, only eMMC on the board.
- OP-TEE installed firmware.

Signed-off-by: Masami Hiramatsu &lt;masami.hiramatsu@linaro.org&gt;
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes</title>
<updated>2020-05-04T01:07:35Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2020-04-22T14:36:33Z</published>
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<id>urn:sha1:1a13827b7750e0dc96231bfb1c06e68cfaa4939d</id>
<content type='text'>
Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual DT files.

Also, 'make ARCH=arm64 dtbs_check' is really noisy.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Stabilize Ethernet RGMII mode of PXs3 ref board</title>
<updated>2020-05-04T00:24:14Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-04-03T01:43:07Z</published>
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<id>urn:sha1:8f664ce7eda58dbc7d75dc9ff41d04786d284256</id>
<content type='text'>
The RGMII PHY implemented in PXs3 ref board needs to change
drive-strength properties of the Ethernet Tx pins to stabilize the PHY.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Add ethernet aliases</title>
<updated>2020-05-04T00:24:00Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-04-03T01:43:06Z</published>
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<id>urn:sha1:44f0746d60bcb575f2268a707e56c37208841e31</id>
<content type='text'>
Add 'aliases' properties for ethernet device.

U-Boot performs a fix-up of the MAC address and will overwrite the values
from the Linux devicetree for aliased ethernet device. The MAC address can
be inherited from U-Boot by adding aliases of ethernet devices.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: uniphier: Add XDMAC node</title>
<updated>2020-05-04T00:18:08Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-04-03T01:43:04Z</published>
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<id>urn:sha1:f03b998de02d66bd5bbbd616668e1a32194f238e</id>
<content type='text'>
Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
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