<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/arm64/include/asm/kvm_psci.h, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/arm64/include/asm/kvm_psci.h?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/arm64/include/asm/kvm_psci.h?h=master'/>
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<updated>2018-02-06T22:53:54Z</updated>
<entry>
<title>arm/arm64: KVM: Consolidate the PSCI include files</title>
<updated>2018-02-06T22:53:54Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2018-02-06T17:56:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1a2fb94e6a771ff94f4afa22497a4695187b820c'/>
<id>urn:sha1:1a2fb94e6a771ff94f4afa22497a4695187b820c</id>
<content type='text'>
As we're about to update the PSCI support, and because I'm lazy,
let's move the PSCI include file to include/kvm so that both
ARM architectures can find it.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Tested-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM/ARM64: KVM: Make kvm_psci_call() return convention more flexible</title>
<updated>2014-04-30T11:18:57Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@linaro.org</email>
</author>
<published>2014-04-29T05:54:18Z</published>
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<id>urn:sha1:e8e7fcc5e2710b31ef842ee799db99c07986c364</id>
<content type='text'>
Currently, the kvm_psci_call() returns 'true' or 'false' based on whether
the PSCI function call was handled successfully or not. This does not help
us emulate system-level PSCI functions where the actual emulation work will
be done by user space (QEMU or KVMTOOL). Examples of such system-level PSCI
functions are: PSCI v0.2 SYSTEM_OFF and SYSTEM_RESET.

This patch updates kvm_psci_call() to return three types of values:
1) &gt; 0 (success)
2) = 0 (success but exit to user space)
3) &lt; 0 (errors)

Signed-off-by: Anup Patel &lt;anup.patel@linaro.org&gt;
Signed-off-by: Pranavkumar Sawargaonkar &lt;pranavkumar@linaro.org&gt;
Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM/ARM64: KVM: Add base for PSCI v0.2 emulation</title>
<updated>2014-04-30T11:18:57Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@linaro.org</email>
</author>
<published>2014-04-29T05:54:16Z</published>
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<id>urn:sha1:7d0f84aae9e231930985eaff63ac91b61aaa15d6</id>
<content type='text'>
Currently, the in-kernel PSCI emulation provides PSCI v0.1 interface to
VCPUs. This patch extends current in-kernel PSCI emulation to provide
PSCI v0.2 interface to VCPUs.

By default, ARM/ARM64 KVM will always provide PSCI v0.1 interface for
keeping the ABI backward-compatible.

To select PSCI v0.2 interface for VCPUs, the user space (i.e. QEMU or
KVMTOOL) will have to set KVM_ARM_VCPU_PSCI_0_2 feature when doing VCPU
init using KVM_ARM_VCPU_INIT ioctl.

Signed-off-by: Anup Patel &lt;anup.patel@linaro.org&gt;
Signed-off-by: Pranavkumar Sawargaonkar &lt;pranavkumar@linaro.org&gt;
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: PSCI implementation</title>
<updated>2013-06-12T15:40:32Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2012-12-12T18:52:05Z</published>
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<id>urn:sha1:dcd2e40c1e1cce302498d16d095b0f8a30326f74</id>
<content type='text'>
Wire the PSCI backend into the exit handling code.

Reviewed-by: Christopher Covington &lt;cov@codeaurora.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
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