linux-dev/arch/arm64/kernel/probes/simulate-insn.c, branch linus/master

arm64: Move aarch32 condition check functions

2021-05-27T16:38:07Z

The functions to check condition flags for aarch32 execution is only used to emulate aarch32 instructions. Move them from the instruction encoding/decoding code to the trap handling files. Signed-off-by: Julien Thierry Link: https://lore.kernel.org/r/20210303170536.1838032-3-jthierry@redhat.com [will: leave aarch32_opcode_cond_checks where it is] Signed-off-by: Will Deacon Signed-off-by: Will Deacon

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174

2019-05-30T18:26:41Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Kate Stewart Reviewed-by: Richard Fontana Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman

arm64/kprobes: consistently handle MRS/MSR with XZR

2017-02-15T12:20:29Z

Now that we have XZR-safe helpers for fiddling with registers, use these in the arm64 kprobes code rather than open-coding the logic. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon Signed-off-by: Will Deacon

arm64/kprobes: Tidy up sign-extension usage

2016-11-07T18:15:03Z

Kprobes does not need its own homebrewed (and frankly inscrutable) sign extension macro; just use the standard kernel functions instead. Since the compiler actually recognises the sign-extension idiom of the latter, we also get the small bonus of some nicer codegen, as each displacement calculation helper then compiles to a single optimal SBFX instruction. Signed-off-by: Robin Murphy Acked-by: Will Deacon Signed-off-by: Catalin Marinas

arm64: kprobes instruction simulation support

2016-07-19T14:03:21Z

Kprobes needs simulation of instructions that cannot be stepped from a different memory location, e.g.: those instructions that uses PC-relative addressing. In simulation, the behaviour of the instruction is implemented using a copy of pt_regs. The following instruction categories are simulated: - All branching instructions(conditional, register, and immediate) - Literal access instructions(load-literal, adr/adrp) Conditional execution is limited to branching instructions in ARM v8. If conditions at PSTATE do not match the condition fields of opcode, the instruction is effectively NOP. Thanks to Will Cohen for assorted suggested changes. Signed-off-by: Sandeepa Prabhu Signed-off-by: William Cohen Signed-off-by: David A. Long Acked-by: Masami Hiramatsu [catalin.marinas@arm.com: removed linux/module.h include] Signed-off-by: Catalin Marinas