linux-dev/arch/i386/kernel/cpu/amd.c, branch master

i386: move kernel/cpu

2007-10-11T09:16:58Z

Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar

i386: Use global flag to disable broken local apic timer on AMD CPUs.

2007-08-11T22:58:13Z

The Averatec 2370 and some other Turion laptop BIOS seems to program the ENABLE_C1E MSR inconsistently between cores. This confuses the lapic use heuristics because when C1E is enabled anywhere it seems to affect the complete chip. Use a global flag instead of a per cpu flag to handle this. If any CPU has C1E enabled disabled lapic use. Thanks to Cal Peake for debugging. Cc: tglx@linutronix.de Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds

i386: Tune AMD Fam10h/11h like K8

2007-07-22T18:03:38Z

This mainly changes the nops for alternative, so not very revolutionary. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds

i386: Add L3 cache support to AMD CPUID4 emulation

2007-07-22T01:37:08Z

With that an L3 cache is correctly reported in the cache information in /sys With fixes from Andreas Herrmann and Dean Gaudet and Joachim Deguara Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds

i386: Clear MCE flag on AMD K6

2007-05-21T16:56:57Z

It reports machine check capability in CPUID, but doesn't actually implement all the necessary MSRs of the standard Intel machine check architecture. This fixes a boot failure on K6s recently introduced. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds

[PATCH] i386: Don't delete cpu_devs data to identify different x86 types in late_initcall

2007-05-02T17:27:22Z

In arch/i386/cpu/common.c there is: cpu_devs[X86_VENDOR_INTEL] cpu_devs[X86_VENDOR_CYRIX] cpu_devs[X86_VENDOR_AMD] ... They are all filled with data early. The data (struct) got set to NULL for all, but Intel in different late_initcall (exit_cpu_vendor) calls. I don't see what sense this makes at all, maybe something that got forgotten with the HOTPLUG_CPU extenstions? Please check/review whether initdata, cpuinitdata is still ok and this still works with HOTPLUG_CPU and without, it should... Signed-off-by: Thomas Renninger Signed-off-by: Andi Kleen Cc: davej@redhat.com

[PATCH] x86: Don't use MWAIT on AMD Family 10

2007-05-02T17:27:12Z

It doesn't put the CPU into deeper sleep states, so it's better to use the standard idle loop to save power. But allow to reenable it anyways for benchmarking. I also removed the obsolete idle=halt on i386 Cc: andreas.herrmann@amd.com Signed-off-by: Andi Kleen

[PATCH] x86-64: Disable local APIC timer use on AMD systems with C1E

2007-04-02T10:14:12Z

AMD dual core laptops with C1E do not run the APIC timer correctly when they go idle. Previously the code assumed this only happened on C2 or deeper. But not all of these systems report support C2. Use a AMD supplied snippet to detect C1E being enabled and then disable local apic timer use. This supercedes an earlier workaround using DMI detection of specific systems. Thanks to Mark Langsdorf for the detection snippet. Signed-off-by: Andi Kleen

[PATCH] i386: remove duplicate printk

2006-12-07T01:14:11Z

We do the exact same printk about a dozen lines above with no intermediate printk's. Signed-off-by: Dave Jones Signed-off-by: Andi Kleen

[PATCH] i386: mark cpu cache functions as __cpuinit

2006-09-26T08:52:36Z

Mark i386-specific cpu cache functions as __cpuinit. They are all only called from arch/i386/common.c:display_cache_info() that already is marked as __cpuinit. Signed-off-by: Magnus Damm Signed-off-by: Andi Kleen