<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/i386/kernel/cpu/proc.c, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/i386/kernel/cpu/proc.c?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/i386/kernel/cpu/proc.c?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2007-10-11T09:16:58Z</updated>
<entry>
<title>i386: move kernel/cpu</title>
<updated>2007-10-11T09:16:58Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-10-11T09:16:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f7627e2513987bb5d4e8cb13c4e0a478352141ac'/>
<id>urn:sha1:f7627e2513987bb5d4e8cb13c4e0a478352141ac</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Use a new CPU feature word to cover features that are spread around</title>
<updated>2007-07-12T17:55:54Z</updated>
<author>
<name>Venki Pallipadi</name>
<email>venkatesh.pallipadi@intel.com</email>
</author>
<published>2007-07-11T19:18:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1d67953f2bda8876045c24ae58841f27d9bb7572'/>
<id>urn:sha1:1d67953f2bda8876045c24ae58841f27d9bb7572</id>
<content type='text'>
Some Intel features are spread around in different CPUID leafs like 0x5,
0x6 and 0xA.  Make this feature detection code common across i386 and
x86_64.

Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature
will be enabled automatically by current acpi-cpufreq driver.

Refer to Intel Software Developer's Manual for more details about the feature.

Thanks to hpa (H Peter Anvin) for the making the actual code detecting the
scattered features data-driven.

Signed-off-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Unify the CPU features vectors between i386 and x86-64</title>
<updated>2007-07-12T17:55:54Z</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@zytor.com</email>
</author>
<published>2007-07-11T19:18:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec481536b15eb0520d8f0204b0294480050fe1f8'/>
<id>urn:sha1:ec481536b15eb0520d8f0204b0294480050fe1f8</id>
<content type='text'>
Unify the handling of the CPU features vectors between i386 and x86-64.
This also adopts the collapsing of features which are required at
compile-time into constant tests from x86-64 to i386.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] x86: remove constant_tsc reporting from /proc/cpuinfo' power flags</title>
<updated>2007-05-02T17:27:09Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2007-05-02T17:27:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d824395c5994adbf7efe377cc67f732133270554'/>
<id>urn:sha1:d824395c5994adbf7efe377cc67f732133270554</id>
<content type='text'>
remove the reporting of the constant_tsc flag from the "power management"
field in /proc/cpuinfo.  The NULL value there was replaced by "" because
the former would result in a printout of [8] if the flag is set.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</content>
</entry>
<entry>
<title>[PATCH] x86: Add new CPUID bits for AMD Family 10 CPUs in /proc/cpuinfo</title>
<updated>2007-02-13T12:26:25Z</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2007-02-13T12:26:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f790cd30d002949a12623b2a8cec4d4e5a8887ef'/>
<id>urn:sha1:f790cd30d002949a12623b2a8cec4d4e5a8887ef</id>
<content type='text'>
Just various new acronyms. The new popcnt bit is in the middle
of Intel space. This looks a little weird, but I've been assured
it's ok.

Also I fixed RDTSCP for i386 which was at the wrong place.

For i386 and x86-64.

Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</content>
</entry>
<entry>
<title>[PATCH] i386: Retrieve CLFLUSH size from CPUID</title>
<updated>2006-12-07T01:14:05Z</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2006-12-07T01:14:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=770d132f03ac15b12919f1bac481f4beda13e094'/>
<id>urn:sha1:770d132f03ac15b12919f1bac481f4beda13e094</id>
<content type='text'>
Also report it in /proc/cpuinfo similar to x86-64.

Needed for followon patch

Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</content>
</entry>
<entry>
<title>[PATCH] i386/x86-64: New Intel feature flags</title>
<updated>2006-09-26T08:52:42Z</updated>
<author>
<name>Dave Jones</name>
<email>davej@redhat.com</email>
</author>
<published>2006-09-26T08:52:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dcf10307c3fff2bca4b104ad8fe4e3aa8dcb2ad1'/>
<id>urn:sha1:dcf10307c3fff2bca4b104ad8fe4e3aa8dcb2ad1</id>
<content type='text'>
Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
As described in "Intel Processor idenfication and the CPUID instruction
AP485 Sept 2006"

AK: also added for x86-64

Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</content>
</entry>
<entry>
<title>[PATCH] i386: move phys_proc_id and cpu_core_id to cpuinfo_x86</title>
<updated>2006-06-28T00:32:37Z</updated>
<author>
<name>Rohit Seth</name>
<email>rohitseth@google.com</email>
</author>
<published>2006-06-27T09:53:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4b89aff930d632be10d557d08d1b60dee7163dbe'/>
<id>urn:sha1:4b89aff930d632be10d557d08d1b60dee7163dbe</id>
<content type='text'>
Move the phys_core_id and cpu_core_id to cpuinfo_x86 structure.  Similar
patch for x86_64 is already accepted by Andi earlier this week.

[akpm@osdl.org: fix warning]
Signed-off-by: Rohit Seth &lt;rohitseth@google.com&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] x86: constify some parts of arch/i386/kernel/cpu/</title>
<updated>2006-06-28T00:32:37Z</updated>
<author>
<name>Andreas Mohr</name>
<email>andi@rhlx01.fht-esslingen.de</email>
</author>
<published>2006-06-27T09:53:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7f35bf929ffe2b3967c8f398880fcb78fcd2ab5c'/>
<id>urn:sha1:7f35bf929ffe2b3967c8f398880fcb78fcd2ab5c</id>
<content type='text'>
Signed-off-by: Andreas Mohr &lt;andi@lisas.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] x86: VIA C7 CPU flags</title>
<updated>2006-06-23T14:42:59Z</updated>
<author>
<name>Michal Ludvig</name>
<email>michal@logix.cz</email>
</author>
<published>2006-06-23T09:04:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=224f611c1639cb6c134a934dae7f7b9f0ac3b540'/>
<id>urn:sha1:224f611c1639cb6c134a934dae7f7b9f0ac3b540</id>
<content type='text'>
New CPU flags for next generation of crypto engine as found in VIA C7
processors.

Signed-off-by: Michal Ludvig &lt;michal@logix.cz&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
</feed>
