<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/mips/bcm47xx/setup.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/bcm47xx/setup.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/mips/bcm47xx/setup.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2020-10-16T19:40:55Z</updated>
<entry>
<title>Merge tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2020-10-16T19:40:55Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-10-16T19:40:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09a31a7e3723afd79022d5d3ff3634c2630c2eeb'/>
<id>urn:sha1:09a31a7e3723afd79022d5d3ff3634c2630c2eeb</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - removed support for PNX833x alias NXT_STB22x

 - included Ingenic SoC support into generic MIPS kernels

 - added support for new Ingenic SoCs

 - converted workaround selection to use Kconfig

 - replaced old boot mem functions by memblock_*

 - enabled COP2 usage in kernel for Loongson64 to make use
   of 16byte load/stores possible

 - cleanups and fixes

* tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (92 commits)
  MIPS: DEC: Restore bootmem reservation for firmware working memory area
  MIPS: dec: fix section mismatch
  bcm963xx_tag.h: fix duplicated word
  mips: ralink: enable zboot support
  MIPS: ingenic: Remove CPU_SUPPORTS_HUGEPAGES
  MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit
  MIPS: cpu-probe: introduce exclusive R3k CPU probe
  MIPS: cpu-probe: move fpu probing/handling into its own file
  MIPS: replace add_memory_region with memblock
  MIPS: Loongson64: Clean up numa.c
  MIPS: Loongson64: Select SMP in Kconfig to avoid build error
  mips: octeon: Add Ubiquiti E200 and E220 boards
  MIPS: SGI-IP28: disable use of ll/sc in kernel
  MIPS: tx49xx: move tx4939_add_memory_regions into only user
  MIPS: pgtable: Remove used PAGE_USERIO define
  MIPS: alchemy: Share prom_init implementation
  MIPS: alchemy: Fix build breakage, if TOUCHSCREEN_WM97XX is disabled
  MIPS: process: include exec.h header in process.c
  MIPS: process: Add prototype for function arch_dup_task_struct
  MIPS: idle: Add prototype for function check_wait
  ...
</content>
</entry>
<entry>
<title>MIPS: replace add_memory_region with memblock</title>
<updated>2020-10-12T10:01:36Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-10-09T12:14:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e7ae8d174eec0b3b9de92b76abc15f3f53b98f1c'/>
<id>urn:sha1:e7ae8d174eec0b3b9de92b76abc15f3f53b98f1c</id>
<content type='text'>
add_memory_region was the old interface for registering memory and
was already changed to used memblock internaly. Replace it by
directly calling memblock functions.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM47XX: Remove the needless check with the 1074K</title>
<updated>2020-09-23T12:48:53Z</updated>
<author>
<name>Wei Li</name>
<email>liwei391@huawei.com</email>
</author>
<published>2020-09-23T06:53:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=be090fa62080d8501a5651a73cb954721966b125'/>
<id>urn:sha1:be090fa62080d8501a5651a73cb954721966b125</id>
<content type='text'>
As there is no known soc powered by mips 1074K in bcm47xx series,
the check with 1074K is needless. So just remove it.

Link: https://wireless.wiki.kernel.org/en/users/Drivers/b43/soc
Fixes: 442e14a2c55e ("MIPS: Add 1074K CPU support explicitly.")
Signed-off-by: Wei Li &lt;liwei391@huawei.com&gt;
Acked-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>net: phy: fixed-phy: Drop GPIO from fixed_phy_add()</title>
<updated>2019-02-05T02:33:36Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2019-02-04T10:26:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5468e82f7034f0ae175a3ce075441356099bdaa3'/>
<id>urn:sha1:5468e82f7034f0ae175a3ce075441356099bdaa3</id>
<content type='text'>
All users of the fixed_phy_add() pass -1 as GPIO number
to the fixed phy driver, and all users of fixed_phy_register()
pass -1 as GPIO number as well, except for the device
tree MDIO bus.

Any new users should create a proper device and pass the
GPIO as a descriptor associated with the device so delete
the GPIO argument from the calls and drop the code looking
requesting a GPIO in fixed_phy_add().

In fixed phy_register(), investigate the "fixed-link"
node and pick the GPIO descriptor from "link-gpios" if
this property exists. Move the corresponding code out
of of_mdio.c as the fixed phy code anyways requires
OF to be in use.

Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM47XX: Setup struct device for the SoC</title>
<updated>2019-01-09T21:21:02Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>rafal@milecki.pl</email>
</author>
<published>2019-01-03T07:34:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=321c46b91550adc03054125fa7a1639390608e1a'/>
<id>urn:sha1:321c46b91550adc03054125fa7a1639390608e1a</id>
<content type='text'>
So far we never had any device registered for the SoC. This resulted in
some small issues that we kept ignoring like:
1) Not working GPIOLIB_IRQCHIP (gpiochip_irqchip_add_key() failing)
2) Lack of proper tree in the /sys/devices/
3) mips_dma_alloc_coherent() silently handling empty coherent_dma_mask

Kernel 4.19 came with a lot of DMA changes and caused a regression on
bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic dma
noncoherent ops for simple noncoherent platforms") DMA coherent
allocations just fail. Example:
[    1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed
[    1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA
[    1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12
[    1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded

The bgmac driver also triggers a WARNING:
[    0.959486] ------------[ cut here ]------------
[    0.964387] WARNING: CPU: 0 PID: 1 at ./include/linux/dma-mapping.h:516 bgmac_enet_probe+0x1b4/0x5c4
[    0.973751] Modules linked in:
[    0.976913] CPU: 0 PID: 1 Comm: swapper Not tainted 4.19.9 #0
[    0.982750] Stack : 804a0000 804597c4 00000000 00000000 80458fd8 8381bc2c 838282d4 80481a47
[    0.991367]         8042e3ec 00000001 804d38f0 00000204 83980000 00000065 8381bbe0 6f55b24f
[    0.999975]         00000000 00000000 80520000 00002018 00000000 00000075 00000007 00000000
[    1.008583]         00000000 80480000 000ee811 00000000 00000000 00000000 80432c00 80248db8
[    1.017196]         00000009 00000204 83980000 803ad7b0 00000000 801feeec 00000000 804d0000
[    1.025804]         ...
[    1.028325] Call Trace:
[    1.030875] [&lt;8000aef8&gt;] show_stack+0x58/0x100
[    1.035513] [&lt;8001f8b4&gt;] __warn+0xe4/0x118
[    1.039708] [&lt;8001f9a4&gt;] warn_slowpath_null+0x48/0x64
[    1.044935] [&lt;80248db8&gt;] bgmac_enet_probe+0x1b4/0x5c4
[    1.050101] [&lt;802498e0&gt;] bgmac_probe+0x558/0x590
[    1.054906] [&lt;80252fd0&gt;] bcma_device_probe+0x38/0x70
[    1.060017] [&lt;8020e1e8&gt;] really_probe+0x170/0x2e8
[    1.064891] [&lt;8020e714&gt;] __driver_attach+0xa4/0xec
[    1.069784] [&lt;8020c1e0&gt;] bus_for_each_dev+0x58/0xb0
[    1.074833] [&lt;8020d590&gt;] bus_add_driver+0xf8/0x218
[    1.079731] [&lt;8020ef24&gt;] driver_register+0xcc/0x11c
[    1.084804] [&lt;804b54cc&gt;] bgmac_init+0x1c/0x44
[    1.089258] [&lt;8000121c&gt;] do_one_initcall+0x7c/0x1a0
[    1.094343] [&lt;804a1d34&gt;] kernel_init_freeable+0x150/0x218
[    1.099886] [&lt;803a082c&gt;] kernel_init+0x10/0x104
[    1.104583] [&lt;80005878&gt;] ret_from_kernel_thread+0x14/0x1c
[    1.110107] ---[ end trace f441c0d873d1fb5b ]---

This patch setups a "struct device" (and passes it to the bcma) which
allows fixing all the mentioned problems. It'll also require a tiny bcma
patch which will follow through the wireless tree &amp; its maintainer.

Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms")
Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Acked-by: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-wireless@vger.kernel.org
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org # v4.19+
</content>
</entry>
<entry>
<title>Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"</title>
<updated>2018-07-27T17:07:32Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>rafal@milecki.pl</email>
</author>
<published>2018-07-27T11:13:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d5ea019f8a381f88545bb26993b62ec24a2796b7'/>
<id>urn:sha1:d5ea019f8a381f88545bb26993b62ec24a2796b7</id>
<content type='text'>
This reverts commit 2a027b47dba6 ("MIPS: BCM47XX: Enable 74K Core
ExternalSync for PCIe erratum").

Enabling ExternalSync caused a regression for BCM4718A1 (used e.g. in
Netgear E3000 and ASUS RT-N16): it simply hangs during PCIe
initialization. It's likely that BCM4717A1 is also affected.

I didn't notice that earlier as the only BCM47XX devices with PCIe I
own are:
1) BCM4706 with 2 x 14e4:4331
2) BCM4706 with 14e4:4360 and 14e4:4331
it appears that BCM4706 is unaffected.

While BCM5300X-ES300-RDS.pdf seems to document that erratum and its
workarounds (according to quotes provided by Tokunori) it seems not even
Broadcom follows them.

According to the provided info Broadcom should define CONF7_ES in their
SDK's mipsinc.h and implement workaround in the si_mips_init(). Checking
both didn't reveal such code. It *could* mean Broadcom also had some
problems with the given workaround.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Reported-by: Michael Marley &lt;michael@michaelmarley.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20032/
URL: https://bugs.openwrt.org/index.php?do=details&amp;task_id=1688
Cc: Tokunori Ikegami &lt;ikegami@allied-telesis.co.jp&gt;
Cc: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
</content>
</entry>
<entry>
<title>MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum</title>
<updated>2018-06-18T21:19:50Z</updated>
<author>
<name>Tokunori Ikegami</name>
<email>ikegami@allied-telesis.co.jp</email>
</author>
<published>2018-06-03T14:02:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2a027b47dba6b77ab8c8e47b589ae9bbc5ac6175'/>
<id>urn:sha1:2a027b47dba6b77ab8c8e47b589ae9bbc5ac6175</id>
<content type='text'>
The erratum and workaround are described by BCM5300X-ES300-RDS.pdf as
below.

  R10: PCIe Transactions Periodically Fail

    Description: The BCM5300X PCIe does not maintain transaction ordering.
                 This may cause PCIe transaction failure.
    Fix Comment: Add a dummy PCIe configuration read after a PCIe
                 configuration write to ensure PCIe configuration access
                 ordering. Set ES bit of CP0 configu7 register to enable
                 sync function so that the sync instruction is functional.
    Resolution:  hndpci.c: extpci_write_config()
                 hndmips.c: si_mips_init()
                 mipsinc.h CONF7_ES

This is fixed by the CFE MIPS bcmsi chipset driver also for BCM47XX.
Also the dummy PCIe configuration read is already implemented in the
Linux BCMA driver.

Enable ExternalSync in Config7 when CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
too so that the sync instruction is externalised.

Signed-off-by: Tokunori Ikegami &lt;ikegami@allied-telesis.co.jp&gt;
Reviewed-by: Paul Burton &lt;paul.burton@mips.com&gt;
Acked-by: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Cc: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/19461/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM47xx: Move SPROM driver to drivers/firmware/</title>
<updated>2016-05-13T12:01:43Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-01-25T08:50:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2ab71a02c56f8244ac611b5c6e6603c6fe83b966'/>
<id>urn:sha1:2ab71a02c56f8244ac611b5c6e6603c6fe83b966</id>
<content type='text'>
Broadcom ARM home routers store SPROM content in NVRAM just like MIPS
ones. To share SPROM code we need to move it out of arch/mips/ to some
common place. We already have bcm47xx_nvram in firmware path and SPROM
should fit there as well.
This driver is responsible for parsing SoC configuration data into a
struct shared between ssb and bcma buses.
This was tested with BCM4706 &amp; BCM5357C0 (BCM47XX) and BCM4708A0
(ARCH_BCM_5301X).

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12210/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>ssb: pick SoC invariants code from MIPS BCM47xx arch</title>
<updated>2015-12-16T14:36:25Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2015-12-09T22:36:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=541c9a84cd85203244307d9ebb821102eed82789'/>
<id>urn:sha1:541c9a84cd85203244307d9ebb821102eed82789</id>
<content type='text'>
There is code in ssb fetching "invariants" that is basically a set of
board specific data. Every host requires its own implementation of
reading function. In ssb we have support for PCI, PCMCIA &amp; SDIO.
For some (historical?) reason code reading "invariants" for SoC was
placed in arch code and provided by a callback. This is not needed
nowadays, so lets move that into ssb. This way we keep all "invariants"
functions in a single module making code cleaner.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM47xx: Fetch board info directly in callback function</title>
<updated>2015-11-11T07:36:57Z</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2015-10-26T10:13:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d8cfb5037bfc875e6dc8e09e4caceb443c04ff6a'/>
<id>urn:sha1:d8cfb5037bfc875e6dc8e09e4caceb443c04ff6a</id>
<content type='text'>
This drops another symbol dependency between setup.c and sprom.c which
will allow us to make SPROM code a separated module (and share it with
ARM).
Patch tested on Linksys WRT300N V1.

Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11360/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
