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<title>linux-dev/arch/mips/include/asm/mach-loongson1, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-loongson1?h=master</id>
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<updated>2015-06-21T19:53:59Z</updated>
<entry>
<title>MIPS: Loongson: Naming style cleanup and rework</title>
<updated>2015-06-21T19:53:59Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2015-04-21T02:00:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=30ad29bb48881ee11f5daf30c6fc50292ae08c57'/>
<id>urn:sha1:30ad29bb48881ee11f5daf30c6fc50292ae08c57</id>
<content type='text'>
Currently, code of Loongson-2/3 is under loongson directory and code of
Loongson-1 is under loongson1 directory. Besides, there are Kconfig
options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is
very ugly and confusing. Since Loongson-2/3 are both 64-bit general-
purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names
and Kconfig symbols from loongson/loongson1 to loongson64/loongson32.

[ralf@linux-mips.org: Resolve a number of simple conflicts.]

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Cc: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9790/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Create a common &lt;asm/mach-generic/war.h&gt;</title>
<updated>2015-03-31T09:59:40Z</updated>
<author>
<name>Kevin Cernekee</name>
<email>cernekee@gmail.com</email>
</author>
<published>2015-03-16T21:43:07Z</published>
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<id>urn:sha1:d631fc60706ccd86c5c2b0084bcea0739952ce90</id>
<content type='text'>
11 platforms require at least one of these workarounds to be enabled; 22
platforms do not.  In the latter case we can fall back to a generic version.

Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR.

Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9567/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson1B: Some fixes/updates for LS1B</title>
<updated>2014-11-24T06:45:09Z</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2014-10-10T03:40:01Z</published>
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<id>urn:sha1:f29ad10de6c345c8ae4cb33a99ba8ff29bdcd751</id>
<content type='text'>
- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
   (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
 - Add GMAC1 support and setup MUX in terms of PHY mode.
 - Add CPUFreq support.
 - Add MUX Register Definitions.
 - Add PWM Register Definitions.
 - Update clock register bitfields according to the latest spec.
 - Update clock related stuff.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson1B: Fix reboot problem on LS1B</title>
<updated>2014-11-24T06:45:09Z</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2014-10-10T03:39:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a13f0795752389f84bc31b9171cb79ad6759e4db'/>
<id>urn:sha1:a13f0795752389f84bc31b9171cb79ad6759e4db</id>
<content type='text'>
- Correct the header file of watchdog registers
 - Use ioremap_nocache() to access watchdog registers instead

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8022/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30Z</published>
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<id>urn:sha1:7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next</title>
<updated>2012-12-13T18:40:13Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-12-13T18:40:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=241738bd51cb0efe58e6c570223153e970afe3ae'/>
<id>urn:sha1:241738bd51cb0efe58e6c570223153e970afe3ae</id>
<content type='text'>
</content>
</entry>
<entry>
<title>MIPS: PMC-Sierra Yosemite: Remove support.</title>
<updated>2012-12-13T17:15:30Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-12-11T20:02:55Z</published>
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<id>urn:sha1:bdf20507da11a9a5b32ef04fa09f352828189aef</id>
<content type='text'>
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson1B: improve ls1x_serial_setup()</title>
<updated>2012-11-09T10:37:20Z</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2012-10-23T05:17:01Z</published>
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<id>urn:sha1:446076459974ce00f02ce4954c2622fc70cb7597</id>
<content type='text'>
Improve ls1x_serial_setup().

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4432
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson1B: use common clock infrastructure instead of private APIs</title>
<updated>2012-11-09T10:37:20Z</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2012-10-23T05:17:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=17ded0a89b3b0b6ac626d58d469ef899f21e2d42'/>
<id>urn:sha1:17ded0a89b3b0b6ac626d58d469ef899f21e2d42</id>
<content type='text'>
Use common clock infrastructure instead of private APIs.
1. Enable COMMON_CLK in the Kconfig.
2. Remove private clock APIs, which are replaced by the code in
   drivers/clk/clk-ls1x.c.
3. Modify header file for drivers/clk/clk-ls1x.c.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4431
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson 1B: Add board support</title>
<updated>2012-07-25T14:17:24Z</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2012-07-25T14:17:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ca585cf9fb818bfcfcac6968c2b242dcd0693b08'/>
<id>urn:sha1:ca585cf9fb818bfcfcac6968c2b242dcd0693b08</id>
<content type='text'>
Adds basic platform devices for Loongson 1B, including serial port,
ethernet, USB, RTC and interrupt handler.

The Loongson 1B UART is compatible with NS16550A, the Loongson 1B GMAC is
built around a Synopsys IP Core.

Use normal instead of enhanced descriptors.

Thanks to Giuseppe for updating the normal descriptor in stmmac driver.
Thanks to Zhao Zhang for implementing the RTC driver.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/4133/
Patchwork: https://patchwork.linux-mips.org/patch/4134/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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