<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/mips/include/asm/mach-loongson64, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-loongson64?h=master</id>
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<updated>2022-07-20T11:09:21Z</updated>
<entry>
<title>irqchip/loongson-liointc: Add ACPI init support</title>
<updated>2022-07-20T11:09:21Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2022-07-20T10:51:29Z</published>
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<id>urn:sha1:0858ed035a85c3ae79553200d2d818797cf849f5</id>
<content type='text'>
LIOINTC stands for "Legacy I/O Interrupts" that described in Section
11.1 of "Loongson 3A5000 Processor Reference Manual". For more
information please refer Documentation/loongarch/irq-chip-model.rst.

Co-developed-by: Jianmin Lv &lt;lvjianmin@loongson.cn&gt;
Signed-off-by: Jianmin Lv &lt;lvjianmin@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/1658314292-35346-11-git-send-email-lvjianmin@loongson.cn
</content>
</entry>
<entry>
<title>irqchip/loongson-pch-pic: Add ACPI init support</title>
<updated>2022-07-20T11:09:20Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2022-07-20T10:51:27Z</published>
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<id>urn:sha1:bcdd75c596c89d7925a3438fde2578ca23a62b06</id>
<content type='text'>
PCH-PIC/PCH-MSI stands for "Interrupt Controller" that described in
Section 5 of "Loongson 7A1000 Bridge User Manual". For more information
please refer Documentation/loongarch/irq-chip-model.rst.

Co-developed-by: Jianmin Lv &lt;lvjianmin@loongson.cn&gt;
Signed-off-by: Jianmin Lv &lt;lvjianmin@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/1658314292-35346-9-git-send-email-lvjianmin@loongson.cn
</content>
</entry>
<entry>
<title>MIPS: Remove TX39XX support</title>
<updated>2022-03-01T09:07:22Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2022-02-22T09:04:28Z</published>
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<id>urn:sha1:455481fc9a807798eca05f6fb0918ab88109d845</id>
<content type='text'>
No (active) developer owns this hardware, so let's remove Linux support.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Tested-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Use three arguments for slti</title>
<updated>2021-12-09T09:27:27Z</updated>
<author>
<name>Nathan Chancellor</name>
<email>nathan@kernel.org</email>
</author>
<published>2021-12-08T16:56:17Z</published>
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<id>urn:sha1:f2c6c22fa83ab2577619009057b3ebcb5305bb03</id>
<content type='text'>
LLVM's integrated assembler does not support 'slti &lt;reg&gt;, &lt;imm&gt;':

&lt;instantiation&gt;:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:86:2: note: while in macro instantiation
 kernel_entry_setup # cpu specific setup
 ^
&lt;instantiation&gt;:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:150:2: note: while in macro instantiation
 smp_slave_setup
 ^

To increase compatibility with LLVM's integrated assembler, use the full
form of 'slti &lt;reg&gt;, &lt;reg&gt;, &lt;imm&gt;', which matches the rest of
arch/mips/. This does not result in any change for GNU as.

Link: https://github.com/ClangBuiltLinux/linux/issues/1526
Reported-by: Ryutaroh Matsumoto &lt;ryutaroh@ict.e.titech.ac.jp&gt;
Signed-off-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Avoid macro redefinitions</title>
<updated>2021-09-23T09:23:35Z</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2021-09-13T21:34:15Z</published>
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<id>urn:sha1:67512a8cf5a730938fdb1e48de33edfef6015e03</id>
<content type='text'>
To be able to compile the kernel with LTO, the assembler macros cannot
be declared in the global scope, or the compiler will complain about
redefined macros.

Update the code so that macros are defined then undefined when they are
used.

Note that virt support was added in 2.24 and xpa in 2.25. So we still
need the TOOLCHAIN defines for them.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Reviewed-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Add kexec/kdump support</title>
<updated>2021-04-16T07:18:06Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2021-04-13T08:57:23Z</published>
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<id>urn:sha1:6ce48897ce476bed86fde28752c27596e8753277</id>
<content type='text'>
Add kexec/kdump support for Loongson64 by:
1, Provide Loongson-specific kexec functions: loongson_kexec_prepare(),
   loongson_kexec_shutdown() and loongson_crash_shutdown();
2, Provide Loongson-specific assembly code in kexec_smp_wait();

To start Loongson64, The boot CPU needs 3 parameters:
fw_arg0: the number of arguments in cmdline (i.e., argc).
fw_arg1: structure holds cmdline such as "root=/dev/sda1 console=tty"
         (i.e., argv).
fw_arg2: environment (i.e., envp, additional boot parameters from LEFI).

Non-boot CPUs do not need one parameter as the IPI mailbox base address.
They query their own IPI mailbox to get PC, SP and GP in a loopi, until
the boot CPU brings them up.

loongson_kexec_prepare(): Setup cmdline for kexec/kdump. The kexec/kdump
cmdline comes from kexec's "append" option string. This structure will
be parsed in fw_init_cmdline() of arch/mips/fw/lib/cmdline.c. Both image
-&gt;control_code_page and the cmdline need to be in a safe memory region
(memory allocated by the old kernel may be corrupted by the new kernel).
In order to maintain compatibility for the old firmware, the low 2MB is
reserverd and safe for Loongson. So let KEXEC_CTRL_CODE and KEXEC_ARGV_
ADDR be here. LEFI parameters may be corrupted at runtime, so backup it
at mips_reboot_setup(), and then restore it at loongson_kexec_shutdown()
/loongson_crash_shutdown().

loongson_kexec_shutdown(): Wake up all present CPUs and let them go to
reboot_code_buffer. Pass the kexec parameters to kexec_args.

loongson_crash_shutdown(): Pass the kdump parameters to kexec_args.

The assembly part in kexec_smp_wait provide a routine as BIOS does, in
order to keep secondary CPUs in a querying loop.

The layout of low 2MB memory in our design:
0x80000000, the first MB, the first 64K, Exception vectors
0x80010000, the first MB, the second 64K, STR (suspend) data
0x80020000, the first MB, the third and fourth 64K, UEFI HOB
0x80040000, the first MB, the fifth 64K, RT-Thread for SMC
0x80100000, the second MB, the first 64K, KEXEC code
0x80108000, the second MB, the second 64K, KEXEC data

Cc: Eric Biederman &lt;ebiederm@xmission.com&gt;
Tested-by: Jinyang He &lt;hejinyang@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@kernel.org&gt;
Signed-off-by: Jinyang He &lt;hejinyang@loongson.cn&gt;
Signed-off-by: Youling Tang &lt;tangyouling@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Distinguish firmware dependencies DTB/LEFI</title>
<updated>2021-03-25T09:44:01Z</updated>
<author>
<name>Qing Zhang</name>
<email>zhangqing@loongson.cn</email>
</author>
<published>2021-03-15T07:49:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8e2fe0ecfb96d7b1baa9720e36305515c3079e8c'/>
<id>urn:sha1:8e2fe0ecfb96d7b1baa9720e36305515c3079e8c</id>
<content type='text'>
Add DTB boot support, only support Loongson-2K1000 processor
for now, determine whether to use the built-in DTB or the DTB
from the firmware by checking the range of CKSEG0 and XKPHYS.
loongson_fw_interface will be used in the future.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Qing Zhang &lt;zhangqing@loongson.cn&gt;
Tested-by: Ming Wang &lt;wangming01@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: DeviceTree for Loongson-2K1000</title>
<updated>2021-03-25T09:44:00Z</updated>
<author>
<name>Qing Zhang</name>
<email>zhangqing@loongson.cn</email>
</author>
<published>2021-03-15T07:49:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b1a792601f264df7172a728f1a83a05b6b399dfb'/>
<id>urn:sha1:b1a792601f264df7172a728f1a83a05b6b399dfb</id>
<content type='text'>
Add DeviceTree files for Loongson-2K1000 processor, currently only
supports single-core boot.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Qing Zhang &lt;zhangqing@loongson.cn&gt;
Tested-by: Ming Wang &lt;wangming01@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Move loongson_system_configuration to loongson.h</title>
<updated>2021-03-12T10:09:58Z</updated>
<author>
<name>Qing Zhang</name>
<email>zhangqing@loongson.cn</email>
</author>
<published>2021-03-04T11:00:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=76e0c88dbd2498487044b9705641de306d8f23ab'/>
<id>urn:sha1:76e0c88dbd2498487044b9705641de306d8f23ab</id>
<content type='text'>
The purpose of separating loongson_system_configuration from boot_param.h
is to keep the other structure consistent with the firmware.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Qing Zhang &lt;zhangqing@loongson.cn&gt;
Acked-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Remove unused sysconf members</title>
<updated>2021-03-12T10:09:09Z</updated>
<author>
<name>Qing Zhang</name>
<email>zhangqing@loongson.cn</email>
</author>
<published>2021-03-04T11:00:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fc841062221f6ff18b408c7ac31b1af7c9d8a0b6'/>
<id>urn:sha1:fc841062221f6ff18b408c7ac31b1af7c9d8a0b6</id>
<content type='text'>
We don't need them anymore, They are uniform on all Loongson64 systems
and have been fixed in DeviceTree.loongson3_platform_init is replaced
with DTS + driver.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Qing Zhang &lt;zhangqing@loongson.cn&gt;
Acked-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
</feed>
