<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/mips/include/asm/mach-malta, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-malta?h=master</id>
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<updated>2020-09-21T20:16:47Z</updated>
<entry>
<title>MIPS: malta: remove mach-malta/malta-dtshim.h header file</title>
<updated>2020-09-21T20:16:47Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-09-20T21:13:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=307c9926393aed6c48600bea218b9565f2292fcb'/>
<id>urn:sha1:307c9926393aed6c48600bea218b9565f2292fcb</id>
<content type='text'>
To clean up mach-* directories move external declaration of malta_dt_shim()
to mips-boards/malta.h and remove malta-dtshim.h.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: malta: remove unused header file</title>
<updated>2020-09-21T20:16:38Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-09-20T21:08:34Z</published>
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<id>urn:sha1:0c0938ea1d7c0619a096fa40d5bb23586b7ffb51</id>
<content type='text'>
Remove unused heasder file asm/mach-malta/malta-pm.h.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove mach-*/war.h</title>
<updated>2020-09-07T20:25:27Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:54Z</published>
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<id>urn:sha1:601637e42df045ca2d1a9324d56765f044d46866</id>
<content type='text'>
After conversion of all WAR defines we can now remove all mach-*/war.h
files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Get rid of BCM1250_M3_WAR</title>
<updated>2020-09-07T20:25:03Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:52Z</published>
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<id>urn:sha1:ab5743079b8e3d3d4309664903f6b1f579168a56</id>
<content type='text'>
BCM1250_M3_WAR is depending on CONFIG_CONFIG_SB1_PASS_2_WORKAROUNDS.
So using this option directly lets and remove define.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS</title>
<updated>2020-09-07T20:24:51Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:51Z</published>
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<id>urn:sha1:43df4eb2fc9511e09c66252c3fec4f8933a77c73</id>
<content type='text'>
SB1250 uart bug is related to PASS 2 workarounds. Use config
CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config option</title>
<updated>2020-09-07T20:24:40Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:50Z</published>
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<id>urn:sha1:a7fbed988f31d3bf92415226fdf2ffd54606ad93</id>
<content type='text'>
Use a new config option to enable MIPS 34K ITLB workaround and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert R10000_LLSC_WAR info a config option</title>
<updated>2020-09-07T20:24:27Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:49Z</published>
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<id>urn:sha1:256ec489f1c7726f0db9ffee88ba7cdc317806cd</id>
<content type='text'>
Use a new config option to enabel R1000_LLSC workaound and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option</title>
<updated>2020-09-07T20:24:19Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:48Z</published>
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<id>urn:sha1:886ee1363a3ad2b890959f07cffe8d91d995b93a</id>
<content type='text'>
Use a new config option to enable I-cache refill workaround and remove
define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option</title>
<updated>2020-09-07T20:24:09Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:47Z</published>
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<id>urn:sha1:24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b</id>
<content type='text'>
Use a new config option to enable TX49XX I-cache index invalidate
workaround and remove define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WAR</title>
<updated>2020-09-07T20:24:01Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:46Z</published>
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<id>urn:sha1:142439b0520a239bc10cf6c87d7773644c5dfe04</id>
<content type='text'>
Neither MIPS4K_ICACHE_REFILL_WAR nor MIPS_CACHE_SYNC_WAR are implemented,
so removing defines for it won't change anything.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
</feed>
