<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/mips/include/asm/mach-ralink, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-ralink?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-ralink?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-26T08:12:11Z</updated>
<entry>
<title>MIPS: RALINK: Define pci_remap_iospace under CONFIG_PCI_DRIVERS_GENERIC</title>
<updated>2022-05-26T08:12:11Z</updated>
<author>
<name>Tiezhu Yang</name>
<email>yangtiezhu@loongson.cn</email>
</author>
<published>2022-05-25T11:29:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7e4fd16b38923028b01d3dbadf4ca973d885c53e'/>
<id>urn:sha1:7e4fd16b38923028b01d3dbadf4ca973d885c53e</id>
<content type='text'>
kernel test robot reports a build error used with clang compiler and
mips-randconfig [1]:

    ld.lld: error: undefined symbol: pci_remap_iospace

we can see the following configs in the mips-randconfig file:

    CONFIG_RALINK=y
    CONFIG_SOC_MT7620=y
    CONFIG_PCI_DRIVERS_LEGACY=y
    CONFIG_PCI=y

CONFIG_RALINK is set, so pci_remap_iospace is defined in the related
arch/mips/include/asm/mach-ralink/spaces.h header file:

    #define pci_remap_iospace pci_remap_iospace

CONFIG_PCI is set, so pci_remap_iospace() in drivers/pci/pci.c is not
built due to pci_remap_iospace is defined under CONFIG_RALINK.

    #ifndef pci_remap_iospace
    int pci_remap_iospace(const struct resource *res, ...)

    $ objdump -d drivers/pci/pci.o | grep pci_remap_iospace
    00004cc8 &lt;devm_pci_remap_iospace&gt;:
        4d18:	10400008 	beqz	v0,4d3c &lt;devm_pci_remap_iospace+0x74&gt;
        4d2c:	1040000c 	beqz	v0,4d60 &lt;devm_pci_remap_iospace+0x98&gt;
        4d70:	1000fff3 	b	4d40 &lt;devm_pci_remap_iospace+0x78&gt;

In addition, CONFIG_PCI_DRIVERS_GENERIC is not set, so pci_remap_iospace()
in arch/mips/pci/pci-generic.c is not built too.

    #ifdef pci_remap_iospace
    int pci_remap_iospace(const struct resource *res, ...)

For the above reasons, undefined reference pci_remap_iospace() looks like
reasonable.

Here are simple steps to reproduce used with gcc and defconfig:

    cd mips.git
    make vocore2_defconfig # set RALINK, SOC_MT7620, PCI_DRIVERS_LEGACY
    make menuconfig        # set PCI
    make

there exists the following build error:

      LD      vmlinux.o
      MODPOST vmlinux.symvers
      MODINFO modules.builtin.modinfo
      GEN     modules.builtin
      LD      .tmp_vmlinux.kallsyms1
    drivers/pci/pci.o: In function `devm_pci_remap_iospace':
    pci.c:(.text+0x4d24): undefined reference to `pci_remap_iospace'
    Makefile:1158: recipe for target 'vmlinux' failed
    make: *** [vmlinux] Error 1

Define pci_remap_iospace under CONFIG_PCI_DRIVERS_GENERIC can fix the build
error, with this patch, no build error remains. This patch is similar with
commit e538e8649892 ("MIPS: asm: pci: define arch-specific
'pci_remap_iospace()' dependent on 'CONFIG_PCI_DRIVERS_GENERIC'").

[1] https://lore.kernel.org/lkml/202205251247.nQ5cxSV6-lkp@intel.com/

Fixes: 09d97da660ff ("MIPS: Only define pci_remap_iospace() for Ralink")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Tiezhu Yang &lt;yangtiezhu@loongson.cn&gt;
Acked-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove TX39XX support</title>
<updated>2022-03-01T09:07:22Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2022-02-22T09:04:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=455481fc9a807798eca05f6fb0918ab88109d845'/>
<id>urn:sha1:455481fc9a807798eca05f6fb0918ab88109d845</id>
<content type='text'>
No (active) developer owns this hardware, so let's remove Linux support.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Tested-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
</content>
</entry>
<entry>
<title>MIPS: Only define pci_remap_iospace() for Ralink</title>
<updated>2021-12-09T09:22:24Z</updated>
<author>
<name>Tiezhu Yang</name>
<email>yangtiezhu@loongson.cn</email>
</author>
<published>2021-12-08T09:27:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09d97da660ff77df20984496aa0abcd6b88819f2'/>
<id>urn:sha1:09d97da660ff77df20984496aa0abcd6b88819f2</id>
<content type='text'>
After commit 9f76779f2418 ("MIPS: implement architecture-specific
'pci_remap_iospace()'"), there exists the following warning on the
Loongson64 platform:

    loongson-pci 1a000000.pci:       IO 0x0018020000..0x001803ffff -&gt; 0x0000020000
    loongson-pci 1a000000.pci:      MEM 0x0040000000..0x007fffffff -&gt; 0x0040000000
    ------------[ cut here ]------------
    WARNING: CPU: 2 PID: 1 at arch/mips/pci/pci-generic.c:55 pci_remap_iospace+0x84/0x90
    resource start address is not zero
    ...
    Call Trace:
    [&lt;ffffffff8020dc78&gt;] show_stack+0x40/0x120
    [&lt;ffffffff80cf4a0c&gt;] dump_stack_lvl+0x58/0x74
    [&lt;ffffffff8023a0b0&gt;] __warn+0xe0/0x110
    [&lt;ffffffff80cee02c&gt;] warn_slowpath_fmt+0xa4/0xd0
    [&lt;ffffffff80cecf24&gt;] pci_remap_iospace+0x84/0x90
    [&lt;ffffffff807f9864&gt;] devm_pci_remap_iospace+0x5c/0xb8
    [&lt;ffffffff808121b0&gt;] devm_of_pci_bridge_init+0x178/0x1f8
    [&lt;ffffffff807f4000&gt;] devm_pci_alloc_host_bridge+0x78/0x98
    [&lt;ffffffff80819454&gt;] loongson_pci_probe+0x34/0x160
    [&lt;ffffffff809203cc&gt;] platform_probe+0x6c/0xe0
    [&lt;ffffffff8091d5d4&gt;] really_probe+0xbc/0x340
    [&lt;ffffffff8091d8f0&gt;] __driver_probe_device+0x98/0x110
    [&lt;ffffffff8091d9b8&gt;] driver_probe_device+0x50/0x118
    [&lt;ffffffff8091dea0&gt;] __driver_attach+0x80/0x118
    [&lt;ffffffff8091b280&gt;] bus_for_each_dev+0x80/0xc8
    [&lt;ffffffff8091c6d8&gt;] bus_add_driver+0x130/0x210
    [&lt;ffffffff8091ead4&gt;] driver_register+0x8c/0x150
    [&lt;ffffffff80200a8c&gt;] do_one_initcall+0x54/0x288
    [&lt;ffffffff811a5320&gt;] kernel_init_freeable+0x27c/0x2e4
    [&lt;ffffffff80cfc380&gt;] kernel_init+0x2c/0x134
    [&lt;ffffffff80205a2c&gt;] ret_from_kernel_thread+0x14/0x1c
    ---[ end trace e4a0efe10aa5cce6 ]---
    loongson-pci 1a000000.pci: error -19: failed to map resource [io  0x20000-0x3ffff]

We can see that the resource start address is 0x0000020000, because
the ISA Bridge used the zero address which is defined in the dts file
arch/mips/boot/dts/loongson/ls7a-pch.dtsi:

    ISA Bridge: /bus@10000000/isa@18000000
    IO 0x0000000018000000..0x000000001801ffff  -&gt;  0x0000000000000000

Based on the above analysis, the architecture-specific pci_remap_iospace()
is not suitable for Loongson64, we should only define pci_remap_iospace()
for Ralink on MIPS based on the commit background.

Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'")
Suggested-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Tiezhu Yang &lt;yangtiezhu@loongson.cn&gt;
Tested-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Acked-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base'</title>
<updated>2021-10-05T10:36:25Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-09-25T20:32:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebe7e788ee7270cfe43584e99f11b00d1e4bbb3f'/>
<id>urn:sha1:ebe7e788ee7270cfe43584e99f11b00d1e4bbb3f</id>
<content type='text'>
By default MIPS architecture use function 'set_io_port_base()' to set the
virtual address of the first IO port. This function at the end sets variable
'mips_io_port_base' with the desired address. To align things and allow
to change first IO port location address for PCI, set PCI_IOBASE definition
as 'mips_io_port_base'.

Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210925203224.10419-4-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT"</title>
<updated>2021-10-05T10:36:25Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-09-25T20:32:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1958beb80a603d090b8e66f8c3407360bd2d4bed'/>
<id>urn:sha1:1958beb80a603d090b8e66f8c3407360bd2d4bed</id>
<content type='text'>
This reverts commit 159697474db41732ef3b6c2e8d9395f09d1f659e.

There is no real need to increase IO_SPACE_LIMIT if PCI_IOBASE
is properly set to 'mips_io_port_base'. Hence revert this commit
first before doing anything else.

Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210925203224.10419-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT</title>
<updated>2021-09-21T15:30:55Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-08-22T16:10:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=159697474db41732ef3b6c2e8d9395f09d1f659e'/>
<id>urn:sha1:159697474db41732ef3b6c2e8d9395f09d1f659e</id>
<content type='text'>
Defining PCI_IOBASE results in pci resource handling working but the
addresses generated for IO accesses are wrong since the ioremap in the pci core
function 'pci_parse_request_of_pci_ranges' tries to remap to a fixed virtual
address (PC_IOBASE) which can't work for KSEG1 addresses. To get it working this
way, we would need to put PCI_IOBASE somewhere into KSEG2 which will result in
creating TLB entries for IO addresses, which most of the time isn't needed on
MIPS because of access via KSEG1. So avoid to define PCI_IOBASE and increase
IO_SPACE_LIMIT resource for ralink MIPS platform instead, to get valid IO
addresses for resources from pci core 'pci_address_to_pio' function.

Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210822161005.22467-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'staging-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging</title>
<updated>2021-07-05T21:01:53Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-07-05T21:01:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a16d8644bad461bb073b92e812080ea6715ddf2b'/>
<id>urn:sha1:a16d8644bad461bb073b92e812080ea6715ddf2b</id>
<content type='text'>
Pull staging / IIO driver updates from Greg KH:
 "Here is the big set of IIO and staging driver patches for 5.14-rc1.

  Loads of IIO driver updates and additions in here, the shortlog has
  the full details.

  For the staging side, we moved a few drivers out of staging, and
  deleted the kpc2000 drivers as the original developer asked us to
  because no one was working on them anymore.

  Also in here are loads of coding style cleanups due to different
  intern projects focusing on the staging tree to try to get experience
  doing kernel development.

  All of these have been in the linux-next tree for a while with no
  reported problems"

* tag 'staging-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (744 commits)
  staging: hi6421-spmi-pmic: cleanup some macros
  staging: hi6421-spmi-pmic: change identation of a table
  staging: hi6421-spmi-pmic: change a return code
  staging: hi6421-spmi-pmic: better name IRQs
  staging: hi6421-spmi-pmic: use devm_request_threaded_irq()
  staging: hisilicon,hi6421-spmi-pmic.yaml: cleanup descriptions
  spmi: hisi-spmi-controller: move driver from staging
  phy: phy-hi3670-usb3: move driver from staging into phy
  staging: rtl8188eu: remove include/rtw_debug.h header
  staging: rtl8188eu: remove GlobalDebugLevel variable
  staging: rtl8188eu: remove DRIVER_PREFIX preprocessor definition
  staging: rtl8188eu: remove RT_TRACE macro
  staging: rtl8188eu: remove all RT_TRACE calls from hal/rtl8188eu_recv.c
  staging: rtl8188eu: remove all RT_TRACE calls from hal/hal_intf.c
  staging: rtl8188eu: remove all RT_TRACE calls from hal/rtl8188eu_xmit.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_xmit.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_pwrctrl.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_recv.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_ioctl_set.c
  staging: rtl8188eu: remove all RT_TRACE calls from core/rtw_ieee80211.c
  ...
</content>
</entry>
<entry>
<title>MIPS: ralink: Define PCI_IOBASE</title>
<updated>2021-06-15T13:24:29Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-06-14T10:06:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=222b27713d7f7e189cca30ccdcee8e1f953d2c9f'/>
<id>urn:sha1:222b27713d7f7e189cca30ccdcee8e1f953d2c9f</id>
<content type='text'>
PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
required by generic PCI drivers to make memory mapped I/O range
work. Hence define it for ralink architectures to be able to
avoid parsing manually IO ranges in PCI generic driver code.
Function 'plat_mem_setup' for ralink is using 'set_io_port_base'
call using '0xa0000000' as address, so use the same address in
the definition to align things.

Acked-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210614100617.28753-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file</title>
<updated>2021-06-07T07:17:48Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-06-04T11:51:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a49a8717d8693b339fb2b62e5846286d6126de7d'/>
<id>urn:sha1:a49a8717d8693b339fb2b62e5846286d6126de7d</id>
<content type='text'>
Move all related code for SoC RT288X into a new driver located
in 'pinctrl-rt288x.c' source file.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210604115159.8834-7-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file</title>
<updated>2021-06-07T07:17:47Z</updated>
<author>
<name>Sergio Paracuellos</name>
<email>sergio.paracuellos@gmail.com</email>
</author>
<published>2021-06-04T11:51:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=745ec436de7223fbe086be5123fe3014c4220611'/>
<id>urn:sha1:745ec436de7223fbe086be5123fe3014c4220611</id>
<content type='text'>
Move all related code for SoC MT7620 into a new driver located
in 'pinctrl-mt7620.c' source file.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20210604115159.8834-6-sergio.paracuellos@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
