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<title>linux-dev/arch/mips/include/asm/mach-sead3/kernel-entry-init.h, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/include/asm/mach-sead3/kernel-entry-init.h?h=master</id>
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<updated>2016-10-06T16:04:20Z</updated>
<entry>
<title>MIPS: generic: Convert SEAD-3 to a generic board</title>
<updated>2016-10-06T16:04:20Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-10-05T17:18:21Z</published>
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<id>urn:sha1:3f5f0a4475e13345326061f00c68f428232ba2bc</id>
<content type='text'>
Convert the MIPS SEAD-3 board support to be a generic board, supported
by generic kernels.

Because the SEAD-3 boot protocol was defined long ago and we don't want
to force a switch to the UHI protocol, SEAD-3 is added as a legacy board
which is detected by reading the REVISION register. This may technically
not be a valid memory read &amp; future work will include attempting to
handle that gracefully. In practice since SEAD-3 is the only legacy
board supported by the generic kernel so far the read will only happen
on SEAD-3 boards, and even once Malta is converted the same REVISION
register exists there too. Other boards such as Boston, Ci20 &amp; Ci40 will
use the UHI boot protocol &amp; thus not run any of the legacy board detect
functions.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14354/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: MT: Remove SMTC support</title>
<updated>2014-05-23T22:07:01Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-05-23T14:29:44Z</published>
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<id>urn:sha1:b633648c5ad3cfbda0b3daea50d2135d44899259</id>
<content type='text'>
Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell &lt;kevink@paralogos.com&gt; is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras &lt;Markos.Chandras@imgtec.com&gt; patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add core files for MIPS SEAD-3 development platform.</title>
<updated>2012-09-13T20:43:46Z</updated>
<author>
<name>Steven J. Hill</name>
<email>sjhill@mips.com</email>
</author>
<published>2012-05-30T21:02:49Z</published>
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<content type='text'>
More information about the SEAD-3 platform can be found at
&lt;http://www.mips.com/products/development-kits/mips-sead-3/&gt;
on MTI's site. Currently, the M14K family of cores is what
the SEAD-3 is utilised with.

Signed-off-by: Douglas Leung &lt;douglas@mips.com&gt;
Signed-off-by: Chris Dearman &lt;chris@mips.com&gt;
Signed-off-by: Steven J. Hill &lt;sjhill@mips.com&gt;
</content>
</entry>
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