linux-dev/arch/mips/include/asm/netlogic/xlp-hal, branch master

MIPS: Remove NETLOGIC support

2021-10-24T15:24:47Z

No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer

MIPS: Netlogic: Add irq mapping and setup for XHCI port 3

2015-04-01T15:21:53Z

Add support for third XHCI port in XLPII processors. Signed-off-by: Ganesan Ramalingam Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8895/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Handle XLP hardware errata

2015-04-01T15:21:52Z

Core configuration register IFU_BRUB_RESERVE has to be setup to handle a silicon errata which can result in a CPU hang. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8902/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Update function to read DRAM BARs

2015-04-01T15:21:52Z

Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent with the rest of the functions in the file. Pass the the size of the array 'dram_map' to the function, and ensure that it does not write past the end of the array. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8892/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Fix frequency calculation register

2015-04-01T15:21:49Z

Change the PIC frequency calculation to use the register that has the current configuration. The existing code used the register that is written to change frequency, which can have an invalid value if the firmware did not set it up correctly. Signed-off-by: Ganesan Ramalingam Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8885/ Signed-off-by: Ralf Baechle

MIPS: Add MSI support for XLP9XX

2014-05-30T14:51:02Z

In XLP9XX, the interrupt routing table for MSI-X has been moved to the PCIe controller's config space from PIC. There are also 32 MSI-X interrupts available per link on XLP9XX. Update XLP MSI/MSI-X code to handle this. Signed-off-by: Ganesan Ramalingam Signed-off-by: Jayachandran C Cc: g@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6912/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Add support for XLP5XX

2014-05-30T14:50:38Z

Add support for the XLP5XX processor which is an 8 core variant of the XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX. Signed-off-by: Yonghong Song Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6871/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Update XLP9XX/2XX core freq calculation

2014-05-30T14:50:13Z

Calculate XLP 9XX and 2XX core frequency from the per-core PLL. This should give the correct value for all board configurations. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6870/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: PIC freq calculation for XLP 9XX/2XX

2014-05-30T14:49:41Z

Update PIC frequency calculation for XLP9XX and 2XX processors using the correct PLL registers. This should work for all possible board configurations. Signed-off-by: Ganesan Ramalingam Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6876/ Signed-off-by: Ralf Baechle

MIPS: Netlogic: Use PRID_IMP_MASK macro

2014-05-30T14:49:02Z

Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor type. Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6868/ Signed-off-by: Ralf Baechle