<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/mips/mm/page.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/mm/page.c?h=linus%2Fmaster</id>
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<updated>2022-02-22T08:35:49Z</updated>
<entry>
<title>MIPS: remove asm/war.h</title>
<updated>2022-02-22T08:35:49Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2022-02-18T10:04:39Z</published>
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<id>urn:sha1:b56d1cafefaa4550888bace142be404db36b96a1</id>
<content type='text'>
The major part for workaround handling has already moved to config
options. This change replaces the remaining defines by already
available config options and gets rid of war.h

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert R4600_V2_HIT_CACHEOP into a config option</title>
<updated>2020-09-07T20:23:48Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:45Z</published>
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<id>urn:sha1:44def3426e4ac5a2dbdb5c8304397f4daa38eb2f</id>
<content type='text'>
Use a new config option to enable R4600 V2 cacheop hit workaround
and remove define from different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Convert R4600_V1_HIT_CACHEOP into a config option</title>
<updated>2020-09-07T20:23:38Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2020-08-24T16:32:44Z</published>
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<id>urn:sha1:5e5b6527128cea50f12a7064bf61b130b3a2739a</id>
<content type='text'>
Use a new config option to enable R4600 V1 cacheop hit workaround
and remove define from the different war.h files.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mm: don't include asm/pgtable.h if linux/mm.h is already included</title>
<updated>2020-06-09T16:39:13Z</updated>
<author>
<name>Mike Rapoport</name>
<email>rppt@linux.ibm.com</email>
</author>
<published>2020-06-09T04:32:33Z</published>
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<id>urn:sha1:e31cf2f4ca422ac9b14ecc4a1295b8977a20f812</id>
<content type='text'>
Patch series "mm: consolidate definitions of page table accessors", v2.

The low level page table accessors (pXY_index(), pXY_offset()) are
duplicated across all architectures and sometimes more than once.  For
instance, we have 31 definition of pgd_offset() for 25 supported
architectures.

Most of these definitions are actually identical and typically it boils
down to, e.g.

static inline unsigned long pmd_index(unsigned long address)
{
        return (address &gt;&gt; PMD_SHIFT) &amp; (PTRS_PER_PMD - 1);
}

static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
{
        return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
}

These definitions can be shared among 90% of the arches provided
XYZ_SHIFT, PTRS_PER_XYZ and xyz_page_vaddr() are defined.

For architectures that really need a custom version there is always
possibility to override the generic version with the usual ifdefs magic.

These patches introduce include/linux/pgtable.h that replaces
include/asm-generic/pgtable.h and add the definitions of the page table
accessors to the new header.

This patch (of 12):

The linux/mm.h header includes &lt;asm/pgtable.h&gt; to allow inlining of the
functions involving page table manipulations, e.g.  pte_alloc() and
pmd_alloc().  So, there is no point to explicitly include &lt;asm/pgtable.h&gt;
in the files that include &lt;linux/mm.h&gt;.

The include statements in such cases are remove with a simple loop:

	for f in $(git grep -l "include &lt;linux/mm.h&gt;") ; do
		sed -i -e '/include &lt;asm\/pgtable.h&gt;/ d' $f
	done

Signed-off-by: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Cain &lt;bcain@codeaurora.org&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Greentime Hu &lt;green.hu@gmail.com&gt;
Cc: Greg Ungerer &lt;gerg@linux-m68k.org&gt;
Cc: Guan Xuetao &lt;gxt@pku.edu.cn&gt;
Cc: Guo Ren &lt;guoren@kernel.org&gt;
Cc: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Cc: Helge Deller &lt;deller@gmx.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Cc: Mark Salter &lt;msalter@redhat.com&gt;
Cc: Matthew Wilcox &lt;willy@infradead.org&gt;
Cc: Matt Turner &lt;mattst88@gmail.com&gt;
Cc: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Michal Simek &lt;monstr@monstr.eu&gt;
Cc: Mike Rapoport &lt;rppt@kernel.org&gt;
Cc: Nick Hu &lt;nickhu@andestech.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: Richard Weinberger &lt;richard@nod.at&gt;
Cc: Rich Felker &lt;dalias@libc.org&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Cc: Stafford Horne &lt;shorne@gmail.com&gt;
Cc: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Vincent Chen &lt;deanbo422@gmail.com&gt;
Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Link: http://lkml.kernel.org/r/20200514170327.31389-1-rppt@kernel.org
Link: http://lkml.kernel.org/r/20200514170327.31389-2-rppt@kernel.org
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Rename CPU TYPES</title>
<updated>2019-10-31T22:03:10Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-10-20T14:43:13Z</published>
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<id>urn:sha1:268a2d60013049cfd9a0aada77284aa6ea8ad26a</id>
<content type='text'>
CPU_LOONGSON2 -&gt; CPU_LOONGSON2EF
CPU_LOONGSON3 -&gt; CPU_LOONGSON64

As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
</content>
</entry>
<entry>
<title>arch: mips: mm: page: Remove unused function</title>
<updated>2018-06-24T16:27:27Z</updated>
<author>
<name>Rickard Strandqvist</name>
<email>rickard_strandqvist@spectrumdigital.se</email>
</author>
<published>2015-01-01T19:18:22Z</published>
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<id>urn:sha1:829caee7e38273ef27d64207578d4653979c525e</id>
<content type='text'>
Remove the function sb1_dma_init() that is not used anywhere.

This was partially found by using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist &lt;rickard_strandqvist@spectrumdigital.se&gt;
Patchwork: https://patchwork.linux-mips.org/patch/8873/
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: Export {copy, clear}_page functions alongside their definitions</title>
<updated>2017-01-03T15:48:39Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-11-07T11:14:16Z</published>
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<id>urn:sha1:f44374f14c388d1170404d2206d4ff760d018212</id>
<content type='text'>
Now that EXPORT_SYMBOL can be used from assembly source, move the
EXPORT_SYMBOL invocations for the copy_page &amp; clear_page functions to be
alongside their definitions.

With this change there are no longer any symbols exported from
mips_ksyms.c so remove the file.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14515/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: mm: Audit and remove any unnecessary uses of module.h</title>
<updated>2016-10-04T23:31:20Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2016-08-21T19:58:14Z</published>
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<id>urn:sha1:d9ba57780637bfde6ac1efb65a8685231ffbc715</id>
<content type='text'>
Historically a lot of these existed because we did not have
a distinction between what was modular code and what was providing
support to modules via EXPORT_SYMBOL and friends.  That changed
when we forked out support for the latter into the export.h file.

This means we should be able to reduce the usage of module.h
in code that is obj-y Makefile or bool Kconfig.  The advantage
in doing so is that module.h itself sources about 15 other headers;
adding significantly to what we feed cpp, and it can obscure what
headers we are effectively using.

Since module.h was the source for init.h (for __init) and for
export.h (for EXPORT_SYMBOL) we consider each obj-y/bool instance
for the presence of either and replace as needed.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14033/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT</title>
<updated>2016-05-13T12:02:15Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2016-03-03T01:45:13Z</published>
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<id>urn:sha1:1e820da3c9af4f5771d2ad47099919429b906ac6</id>
<content type='text'>
New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A R1,
Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as FTLB,
L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User Local
register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), Fast
TLB refill support, etc.

This patch introduce a config option, CONFIG_LOONGSON3_ENHANCEMENT, to
enable those enhancements which are not probed at run time. If you want
a generic kernel to run on all Loongson 3 machines, please say 'N'
here. If you want a high-performance kernel to run on new Loongson 3
machines only, please say 'Y' here.

Some additional explanations:
1) SFB locates between core and L1 cache, it causes memory access out
   of order, so writel/outl (and other similar functions) need a I/O
   reorder barrier.
2) Loongson 3 has a bug that di instruction can not save the irqflag,
   so arch_local_irq_save() is modified. Since CPU_MIPSR2 is selected
   by CONFIG_LOONGSON3_ENHANCEMENT, generic kernel doesn't use ei/di
   at all.
3) CPU_HAS_PREFETCH is selected by CONFIG_LOONGSON3_ENHANCEMENT, so
   MIPS_CPU_PREFETCH (used by uasm) probing is also put in this patch.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: Steven J . Hill &lt;sjhill@realitydiluted.com&gt;
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12755/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add R16000 detection</title>
<updated>2015-04-01T15:22:13Z</updated>
<author>
<name>Joshua Kinard</name>
<email>kumba@gentoo.org</email>
</author>
<published>2015-01-21T12:59:45Z</published>
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<id>urn:sha1:3057739138eb8fbaa5154b149a864f5218898c73</id>
<content type='text'>
This allows the kernel to correctly detect an R16000 MIPS CPU on systems that
have those.  Otherwise, such systems will detect the CPU as an R14000, due to
similarities in the CPU PRId value.

Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Cc: Linux MIPS List &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9092/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
