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<title>linux-dev/arch/mips/qemu, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/mips/qemu?h=master</id>
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<updated>2008-01-29T10:15:02Z</updated>
<entry>
<title>[MIPS] Qemu: Remove platform.</title>
<updated>2008-01-29T10:15:02Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-01-29T10:15:02Z</published>
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<id>urn:sha1:302922e5f6901eb6f29c58539631f71b3d9746b8</id>
<content type='text'>
The Qemu platform was originally implemented to have an easily supportable
platform until Qemu reaches a state where it emulates a real world system.
Since the latest release Qemu is capable of emulating the MIPSsim and
Malta platforms, so this goal has been reached.  The Qemu plaform is also
rather underfeatured so less useful than a Malta emulation.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SMP: Call platform methods via ops structure.</title>
<updated>2008-01-29T10:14:57Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-11-19T12:23:51Z</published>
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<id>urn:sha1:87353d8ac39c52784da605ecbe965ecdfad609ad</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Cleanup pcspeaker platform device registration.</title>
<updated>2008-01-29T10:14:57Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-01-29T10:14:57Z</published>
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<id>urn:sha1:19388fb092d89e179575bd0b44f51b57e175edf5</id>
<content type='text'>
Move registration into the actual platform code instead of making a
desparate attempt at sharing the hand full of likes of code in pcspeaker.c.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>qemu: do not enable IP7 blindly</title>
<updated>2007-12-09T04:51:10Z</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-11-22T15:44:06Z</published>
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<id>urn:sha1:8f7e7d67cbcbcfd2c72d496f01f5e4c78853ef7d</id>
<content type='text'>
IP7 will be enabled automatically in mips_clockevent_init(), if available.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Qemu: Add early printk, your friend in a cold night.</title>
<updated>2007-11-15T23:21:48Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-11-04T04:49:44Z</published>
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<id>urn:sha1:a57c228935fd55c4a1cf7c0b7823537c81914000</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] time: Code cleanups</title>
<updated>2007-11-02T16:13:46Z</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-10-30T16:21:03Z</published>
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<id>urn:sha1:d9eec1a5d6ae54b0f7562ffe07008a33ac39e8fe</id>
<content type='text'>
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static.  It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup.  It is just a placeholder.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix "no space between function name and open parenthesis" warnings.</title>
<updated>2007-10-11T22:46:15Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:15Z</published>
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<id>urn:sha1:49a89efbbbcc178a39555c43bd59a7593c429664</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] i8253 PIT clocksource and clockevent drivers</title>
<updated>2007-10-11T22:46:10Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:10Z</published>
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<id>urn:sha1:d865bea4dace1d42995a6cf552bc4863842623f4</id>
<content type='text'>
Derived from the i386 variant with a few x86 complexities chopped off.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt</title>
<updated>2007-10-11T22:46:09Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:09Z</published>
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<id>urn:sha1:7bcf7717b6a047c272410d0cd00213185fe6b99d</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] SMP: Scatter __cpuinit over the code as needed.</title>
<updated>2007-08-27T01:16:54Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-08-06T13:02:12Z</published>
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<id>urn:sha1:428ab280a0754656fa09304017b0ce626744cc77</id>
<content type='text'>
MIPS doesn't do CPU hotplugging yet but since many of the functions don't
even have an __init let's fix this right.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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