linux-dev/arch/openrisc/include/asm/bitops/atomic.h, branch linus/masterLinux kernel development work - see feature brancheshttps://git.zx2c4.com/linux-dev/atom/arch/openrisc/include/asm/bitops/atomic.h?h=linus%2Fmaster2017-02-24T19:12:38Zopenrisc: add atomic bitops2017-02-24T19:12:38ZStefan Kristianssonstefan.kristiansson@saunalahti.fi2014-05-12T11:08:26Zurn:sha1:0e9f9fd20ce931cc2cf0519c56ae33fc74d656ad
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666, implement
test_and_change_bit]
Signed-off-by: Stafford Horne <shorne@gmail.com>