<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/powerpc/boot/dts/fsl, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/powerpc/boot/dts/fsl?h=master</id>
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<updated>2022-09-28T09:22:13Z</updated>
<entry>
<title>powerpc: Fix SPE Power ISA properties for e500v1 platforms</title>
<updated>2022-09-28T09:22:13Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-09-02T21:21:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=37b9345ce7f4ab17538ea62def6f6d430f091355'/>
<id>urn:sha1:37b9345ce7f4ab17538ea62def6f6d430f091355</id>
<content type='text'>
Commit 2eb28006431c ("powerpc/e500v2: Add Power ISA properties to comply
with ePAPR 1.1") introduced new include file e500v2_power_isa.dtsi and
should have used it for all e500v2 platforms. But apparently it was used
also for e500v1 platforms mpc8540, mpc8541, mpc8555 and mpc8560.

e500v1 cores compared to e500v2 do not support double precision floating
point SPE instructions. Hence power-isa-sp.fd should not be set on e500v1
platforms, which is in e500v2_power_isa.dtsi include file.

Fix this issue by introducing a new e500v1_power_isa.dtsi include file and
use it in all e500v1 device tree files.

Fixes: 2eb28006431c ("powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220902212103.22534-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc/85xx: P2020: Add law_trgt_if property to PCIe DT nodes</title>
<updated>2022-07-28T06:22:14Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-05-04T18:08:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1f00b5ab992c122c51bc37662b3b4df5963462f3'/>
<id>urn:sha1:1f00b5ab992c122c51bc37662b3b4df5963462f3</id>
<content type='text'>
DT law_trgt_if property defines Local Access Window Target Interface.

Local Access Window Target Interface is used for identifying individual
peripheral and mapping its memory to CPU. Interface id is defined by
hardware itself.

U-Boot uses law_trgt_if DT property in PCIe nodes for configuring memory
mapping of individual PCIe controllers.

Linux kernel fsl_pci.c driver currently does not touch Local Access Window
and expects that U-Boot configures it properly.

Add law_trgt_if property to PCIe DT nodes for P2020. This allows usage of
kernel P2020 PCIe DT nodes in U-Boot. And therefore allows to share P2020
DTS files between Linux kernel and U-Boot.

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220504180822.29782-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc/85xx/p2020: Add fsl,mpc8548-pmc node</title>
<updated>2022-05-22T05:58:28Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-05-06T20:36:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=294299b3d39e8b4ae10c12ef1ed71405ef7b1e43'/>
<id>urn:sha1:294299b3d39e8b4ae10c12ef1ed71405ef7b1e43</id>
<content type='text'>
P2020 also contains Power Management Controller and their registers at
offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
file fsl/p2020si-post.dtsi

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220506203621.26314-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: dts: t1040rdb: fix ports names for Seville Ethernet switch</title>
<updated>2022-02-02T09:32:10Z</updated>
<author>
<name>Maxim Kiselev</name>
<email>bigunclemax@gmail.com</email>
</author>
<published>2022-01-21T09:14:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5ebb74749202a25da4b3cc2eb15470225a05527c'/>
<id>urn:sha1:5ebb74749202a25da4b3cc2eb15470225a05527c</id>
<content type='text'>
On board rev A, the network interface labels for the switch ports
written on the front panel are different than on rev B and later.

This patch fixes network interface names for the switch ports according
to labels that are written on the front panel of the board rev B.
They start from ETH3 and end at ETH10.

This patch also introduces a separate device tree for rev A.
The main device tree is supposed to cover rev B and later.

Fixes: e69eb0824d8c ("powerpc: dts: t1040rdb: add ports for Seville Ethernet switch")
Signed-off-by: Maxim Kiselev &lt;bigunclemax@gmail.com&gt;
Reviewed-by: Maxim Kochetkov &lt;fido_max@inbox.ru&gt;
Reviewed-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220121091447.3412907-1-bigunclemax@gmail.com

</content>
</entry>
<entry>
<title>powerpc: dts: t104xrdb: fix phy type for FMAN 4/5</title>
<updated>2022-01-31T02:45:24Z</updated>
<author>
<name>Maxim Kiselev</name>
<email>bigunclemax@gmail.com</email>
</author>
<published>2021-12-30T15:11:21Z</published>
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<id>urn:sha1:17846485dff91acce1ad47b508b633dffc32e838</id>
<content type='text'>
T1040RDB has two RTL8211E-VB phys which requires setting
of internal delays for correct work.

Changing the phy-connection-type property to `rgmii-id`
will fix this issue.

Signed-off-by: Maxim Kiselev &lt;bigunclemax@gmail.com&gt;
Reviewed-by: Maxim Kochetkov &lt;fido_max@inbox.ru&gt;
Reviewed-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20211230151123.1258321-1-bigunclemax@gmail.com

</content>
</entry>
<entry>
<title>powerpc/fsl/dts: Enable WA for erratum A-009885 on fman3l MDIO buses</title>
<updated>2022-01-19T16:14:18Z</updated>
<author>
<name>Tobias Waldekranz</name>
<email>tobias@waldekranz.com</email>
</author>
<published>2022-01-18T21:50:52Z</published>
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<id>urn:sha1:0d375d610fa96524e2ee2b46830a46a7bfa92a9f</id>
<content type='text'>
This block is used in (at least) T1024 and T1040, including their
variants like T1023 etc.

Fixes: d55ad2967d89 ("powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA FMan")
Signed-off-by: Tobias Waldekranz &lt;tobias@waldekranz.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>powerpc/fsl/dts: Fix phy-connection-type for fm1mac3</title>
<updated>2021-10-02T13:11:46Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2021-10-02T09:04:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=eed183abc0d3b8adb64fd1363b7cea7986cd58d6'/>
<id>urn:sha1:eed183abc0d3b8adb64fd1363b7cea7986cd58d6</id>
<content type='text'>
Property phy-connection-type contains invalid value "sgmii-2500" per scheme
defined in file ethernet-controller.yaml.

Correct phy-connection-type value should be "2500base-x".

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Fixes: 84e0f1c13806 ("powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s)")
Acked-by: Scott Wood &lt;oss@buserror.net&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>powerpc: retire sbc8641d board support</title>
<updated>2021-08-26T14:48:18Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2021-01-07T18:45:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d7c1814f2f4f812d7a39447f975abdc095dbf7aa'/>
<id>urn:sha1:d7c1814f2f4f812d7a39447f975abdc095dbf7aa</id>
<content type='text'>
The support was for this was added to mainline over 12 years ago, in
v2.6.26 [4e8aae89a35d] just around the ppc --&gt; powerpc migration.

I believe the board was introduced shortly after the sbc8548 board,
making it roughly a 14 year old platform - with the CPU speed and
memory size typical for that era.

I haven't had one of these boards for several years, and availability
was discontinued several years before that.

Given that, there is no point in adding a burden to testing coverage
that builds all possible defconfigs, so it makes sense to remove it.

Of course it will remain in the git history forever, for anyone who
happens to find a functional board and wants to tinker with it.

Acked-by: Scott Wood &lt;oss@buserror.net&gt;
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P1010 i2c controllers</title>
<updated>2021-05-27T19:52:16Z</updated>
<author>
<name>Chris Packham</name>
<email>chris.packham@alliedtelesis.co.nz</email>
</author>
<published>2021-05-11T21:20:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=19ae697a1e4edf1d755b413e3aa38da65e2db23b'/>
<id>urn:sha1:19ae697a1e4edf1d755b413e3aa38da65e2db23b</id>
<content type='text'>
The i2c controllers on the P1010 have an erratum where the documented
scheme for i2c bus recovery will not work (A-004447). A different
mechanism is needed which is documented in the P1010 Chip Errata Rev L.

Signed-off-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Acked-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c controllers</title>
<updated>2021-05-27T19:52:06Z</updated>
<author>
<name>Chris Packham</name>
<email>chris.packham@alliedtelesis.co.nz</email>
</author>
<published>2021-05-11T21:20:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7adc7b225cddcfd0f346d10144fd7a3d3d9f9ea7'/>
<id>urn:sha1:7adc7b225cddcfd0f346d10144fd7a3d3d9f9ea7</id>
<content type='text'>
The i2c controllers on the P2040/P2041 have an erratum where the
documented scheme for i2c bus recovery will not work (A-004447). A
different mechanism is needed which is documented in the P2040 Chip
Errata Rev Q (latest available at the time of writing).

Signed-off-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Acked-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
</feed>
