<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/powerpc/boot/dts, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/powerpc/boot/dts?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/powerpc/boot/dts?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-28T09:22:14Z</updated>
<entry>
<title>powerpc: Include e500v1_power_isa.dtsi for remaining e500v1 platforms</title>
<updated>2022-09-28T09:22:14Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-09-02T21:21:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c102432005e8811b80b25641e12c4577970b5558'/>
<id>urn:sha1:c102432005e8811b80b25641e12c4577970b5558</id>
<content type='text'>
There are still some board device tree files without Power ISA properties
which have Freescale e500v1 cores, namely those which are based on
Freescale mpc8540, mpc8541, mpc8555 and mpc8560 processors.

So include newly introduced e500v1_power_isa.dtsi file in devices tree
files with those processors.

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220902212103.22534-2-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: Fix SPE Power ISA properties for e500v1 platforms</title>
<updated>2022-09-28T09:22:13Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-09-02T21:21:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=37b9345ce7f4ab17538ea62def6f6d430f091355'/>
<id>urn:sha1:37b9345ce7f4ab17538ea62def6f6d430f091355</id>
<content type='text'>
Commit 2eb28006431c ("powerpc/e500v2: Add Power ISA properties to comply
with ePAPR 1.1") introduced new include file e500v2_power_isa.dtsi and
should have used it for all e500v2 platforms. But apparently it was used
also for e500v1 platforms mpc8540, mpc8541, mpc8555 and mpc8560.

e500v1 cores compared to e500v2 do not support double precision floating
point SPE instructions. Hence power-isa-sp.fd should not be set on e500v1
platforms, which is in e500v2_power_isa.dtsi include file.

Fix this issue by introducing a new e500v1_power_isa.dtsi include file and
use it in all e500v1 device tree files.

Fixes: 2eb28006431c ("powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220902212103.22534-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: dts: turris1x.dts: Fix labels in DSA cpu port nodes</title>
<updated>2022-09-26T10:58:19Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-08-27T13:15:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8bf056f57f1d16c561e43f9af37301f23990cd21'/>
<id>urn:sha1:8bf056f57f1d16c561e43f9af37301f23990cd21</id>
<content type='text'>
DSA cpu port node has to be marked with "cpu" label.
So fix it for both cpu port nodes.

Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220827131538.14577-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: dts: turris1x.dts: Fix NOR partitions labels</title>
<updated>2022-09-26T10:58:19Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-08-30T22:55:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c9986f0aefd1ae22fe9cf794d49699643f1e268b'/>
<id>urn:sha1:c9986f0aefd1ae22fe9cf794d49699643f1e268b</id>
<content type='text'>
Partition partition@20000 contains generic kernel image and it does not
have to be used only for rescue purposes. Partition partition@1c0000
contains bootable rescue system and partition partition@340000 contains
factory image/data for restoring to NAND. So change partition labels to
better fit their purpose by removing possible misleading substring "rootfs"
from these labels.

Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220830225500.8856-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc/82xx: remove spidev node from mgcoge</title>
<updated>2022-08-26T01:02:21Z</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2022-08-24T08:21:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fd20b60aea6a37788f2f761af405b41c6c34473b'/>
<id>urn:sha1:fd20b60aea6a37788f2f761af405b41c6c34473b</id>
<content type='text'>
Commit 956b200a846e ("spi: spidev: Warn loudly if instantiated from DT
as "spidev"") states that there should not be spidev nodes in DTs.
Remove this non-HW description. There won't be a regression because it
won't bind since 2015 anyhow.

Fixes: 5d1d67e361ea ("powerpc/82xx: add SPI support for mgcoge")
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220824082130.21934-3-wsa+renesas@sang-engineering.com

</content>
</entry>
<entry>
<title>powerpc/85xx: P2020: Add law_trgt_if property to PCIe DT nodes</title>
<updated>2022-07-28T06:22:14Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-05-04T18:08:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1f00b5ab992c122c51bc37662b3b4df5963462f3'/>
<id>urn:sha1:1f00b5ab992c122c51bc37662b3b4df5963462f3</id>
<content type='text'>
DT law_trgt_if property defines Local Access Window Target Interface.

Local Access Window Target Interface is used for identifying individual
peripheral and mapping its memory to CPU. Interface id is defined by
hardware itself.

U-Boot uses law_trgt_if DT property in PCIe nodes for configuring memory
mapping of individual PCIe controllers.

Linux kernel fsl_pci.c driver currently does not touch Local Access Window
and expects that U-Boot configures it properly.

Add law_trgt_if property to PCIe DT nodes for P2020. This allows usage of
kernel P2020 PCIe DT nodes in U-Boot. And therefore allows to share P2020
DTS files between Linux kernel and U-Boot.

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220504180822.29782-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: dts: turris1x.dts: Add CPLD reboot node</title>
<updated>2022-07-27T11:36:03Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-07-13T13:44:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0531a4abd1c6c2e270f5ac6fc725ff550fcd14ab'/>
<id>urn:sha1:0531a4abd1c6c2e270f5ac6fc725ff550fcd14ab</id>
<content type='text'>
CPLD firmware can reset board by writing value 0x01 at CPLD memory offset
0x0d. Define syscon-reboot node for this reset support.

Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers")
Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220713134429.18748-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers</title>
<updated>2022-06-29T09:46:24Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-06-24T08:55:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=54c15ec3b738c6086f2be001dae962ec412640e5'/>
<id>urn:sha1:54c15ec3b738c6086f2be001dae962ec412640e5</id>
<content type='text'>
CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
PowerPC Freescale P2020 CPU and are based on Freescale P2020RDB-PC-A board.
Hardware design is fully open source, all firmware and hardware design
files are available at Turris project website:

https://docs.turris.cz/hw/turris-1x/turris-1x/
https://project.turris.cz/en/hardware.html

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220624085550.20570-1-pali@kernel.org

</content>
</entry>
<entry>
<title>powerpc/microwatt: Add mmu bits to device tree</title>
<updated>2022-05-22T05:59:54Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2022-05-19T12:57:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0ef1ffc7189521e293b4c5532659385dfddf8939'/>
<id>urn:sha1:0ef1ffc7189521e293b4c5532659385dfddf8939</id>
<content type='text'>
In commit 5402e239d09f ("powerpc/64s: Get LPID bit width from device
tree") the kernel tried to determine the pid and lpid bits from the
device tree. If they are not found, there is a fallback, but Microwatt
wasn't covered as it has the unusual configuration of being both !HV and
bare metal.

Set the values in the device tree to avoid having to add a special case.
The lpid value is the only one required, but add both for completeness.

Fixes: 5402e239d09f ("powerpc/64s: Get LPID bit width from device tree")
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
Acked-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220519125706.593532-1-joel@jms.id.au

</content>
</entry>
<entry>
<title>powerpc/85xx/p2020: Add fsl,mpc8548-pmc node</title>
<updated>2022-05-22T05:58:28Z</updated>
<author>
<name>Pali Rohár</name>
<email>pali@kernel.org</email>
</author>
<published>2022-05-06T20:36:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=294299b3d39e8b4ae10c12ef1ed71405ef7b1e43'/>
<id>urn:sha1:294299b3d39e8b4ae10c12ef1ed71405ef7b1e43</id>
<content type='text'>
P2020 also contains Power Management Controller and their registers at
offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
file fsl/p2020si-post.dtsi

Signed-off-by: Pali Rohár &lt;pali@kernel.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220506203621.26314-1-pali@kernel.org

</content>
</entry>
</feed>
