<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/powerpc/kernel/asm-offsets.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/powerpc/kernel/asm-offsets.c?h=linus%2Fmaster</id>
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<updated>2022-02-07T10:03:10Z</updated>
<entry>
<title>powerpc/ftrace: Add support for livepatch to PPC32</title>
<updated>2022-02-07T10:03:10Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-12-20T16:38:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a4520b25276500f1abcfc55d24f1251b7b08eff6'/>
<id>urn:sha1:a4520b25276500f1abcfc55d24f1251b7b08eff6</id>
<content type='text'>
PPC64 needs some special logic to properly set up the TOC.
See commit 85baa095497f ("powerpc/livepatch: Add live patching support
on ppc64le") for details.

PPC32 doesn't have TOC so it doesn't need that logic, so adding
LIVEPATCH support is straight forward.

Add CONFIG_LIVEPATCH_64 and move livepatch stack logic into that item.

Livepatch sample modules all work.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/63cb094125b6a6038c65eeac2abaabbabe63addd.1640017960.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/config: Add CONFIG_BOOKE_OR_40x</title>
<updated>2021-12-09T11:41:19Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-10-19T07:29:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=047a6fd40199eb55ffd18091f7ceae9743d972bf'/>
<id>urn:sha1:047a6fd40199eb55ffd18091f7ceae9743d972bf</id>
<content type='text'>
We have many functionnalities common to 40x and BOOKE, it leads to
many places with #if defined(CONFIG_BOOKE) || defined(CONFIG_40x).

We are going to add a few more with KUAP for booke/40x, so create
a new symbol which is defined when either BOOKE or 40x is defined.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/9a3dbd60924cb25c9f944d3d8205ac5a0d15e229.1634627931.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/32s: Save content of sr0 to avoid 'mfsr'</title>
<updated>2021-12-09T11:41:17Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-10-19T07:29:18Z</published>
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<id>urn:sha1:70428da94c7ad692d306747a04117543827292a7</id>
<content type='text'>
Calling 'mfsr' to get the content of segment registers is heavy,
in addition it requires clearing of the 'reserved' bits.

In order to avoid this operation, save it in mm context and in
thread struct.

The saved sr0 is the one used by kernel, this means that on
locking entry it can be used as is.

For unlocking, the only thing to do is to clear SR_NX.

This improves null_syscall selftest by 12 cycles, ie 4%.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/b02baf2ed8f09bad910dfaeeb7353b2ae6830525.1634627931.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/64s: Move hash MMU support code under CONFIG_PPC_64S_HASH_MMU</title>
<updated>2021-12-09T11:41:13Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2021-12-01T14:41:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=387e220a2e5e630794e1f5219ed6f11e56271c21'/>
<id>urn:sha1:387e220a2e5e630794e1f5219ed6f11e56271c21</id>
<content type='text'>
Compiling out hash support code when CONFIG_PPC_64S_HASH_MMU=n saves
128kB kernel image size (90kB text) on powernv_defconfig minus KVM,
350kB on pseries_defconfig minus KVM, 40kB on a tiny config.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Fixup defined(ARCH_HAS_MEMREMAP_COMPAT_ALIGN), which needs CONFIG.
      Fix radix_enabled() use in setup_initial_memory_limit(). Add some
      stubs to reduce number of ifdefs.]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20211201144153.2456614-18-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc: smp: remove hack to obtain offset of task_struct::cpu</title>
<updated>2021-09-30T14:13:11Z</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2021-09-14T12:10:34Z</published>
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<id>urn:sha1:336868afbaae2d153fc20268a21747c31e5071b8</id>
<content type='text'>
Instead of relying on awful hacks to obtain the offset of the cpu field
in struct task_struct, move it back into struct thread_info, which does
not create the same level of circular dependency hell when trying to
include the header file that defines it.

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>sched: move CPU field back into thread_info if THREAD_INFO_IN_TASK=y</title>
<updated>2021-09-30T14:13:10Z</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2021-09-14T12:10:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bcf9033e5449bdcaa9bed46467a7141a8049dadb'/>
<id>urn:sha1:bcf9033e5449bdcaa9bed46467a7141a8049dadb</id>
<content type='text'>
THREAD_INFO_IN_TASK moved the CPU field out of thread_info, but this
causes some issues on architectures that define raw_smp_processor_id()
in terms of this field, due to the fact that #include'ing linux/sched.h
to get at struct task_struct is problematic in terms of circular
dependencies.

Given that thread_info and task_struct are the same data structure
anyway when THREAD_INFO_IN_TASK=y, let's move it back so that having
access to the type definition of struct thread_info is sufficient to
reference the CPU number of the current task.

Note that this requires THREAD_INFO_IN_TASK's definition of the
task_thread_info() helper to be updated, as task_cpu() takes a
pointer-to-const, whereas task_thread_info() (which is used to generate
lvalues as well), needs a non-const pointer. So make it a macro instead.

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'fixes' into next</title>
<updated>2021-09-03T12:54:12Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2021-09-03T12:54:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a3314262eede9c909a0c797f16f25f941d12c78d'/>
<id>urn:sha1:a3314262eede9c909a0c797f16f25f941d12c78d</id>
<content type='text'>
Merge our fixes branch into next.

That lets us resolve a conflict in arch/powerpc/sysdev/xive/common.c.

Between cbc06f051c52 ("powerpc/xive: Do not skip CPU-less nodes when
creating the IPIs"), which moved request_irq() out of xive_init_ipis(),
and 17df41fec5b8 ("powerpc: use IRQF_NO_DEBUG for IPIs") which added
IRQF_NO_DEBUG to that request_irq() call, which has now moved.
</content>
</entry>
<entry>
<title>powerpc/64e: Get dear offset with _DEAR macro</title>
<updated>2021-08-26T11:21:07Z</updated>
<author>
<name>Xiongwei Song</name>
<email>sxwjean@gmail.com</email>
</author>
<published>2021-08-07T01:02:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d9db6e420268b2d561731468a31f0b15e2e9a145'/>
<id>urn:sha1:d9db6e420268b2d561731468a31f0b15e2e9a145</id>
<content type='text'>
Use _DEAR to get the offset of dear register in pr_regs for 64e cpus.

Signed-off-by: Xiongwei Song &lt;sxwjean@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210807010239.416055-5-sxwjean@me.com

</content>
</entry>
<entry>
<title>powerpc/64e: Get esr offset with _ESR macro</title>
<updated>2021-08-26T11:21:07Z</updated>
<author>
<name>Xiongwei Song</name>
<email>sxwjean@gmail.com</email>
</author>
<published>2021-08-07T01:02:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=cfa47772ca8d53d7a6c9b331a7f6e7c4c9827214'/>
<id>urn:sha1:cfa47772ca8d53d7a6c9b331a7f6e7c4c9827214</id>
<content type='text'>
Use _ESR to get the offset of esr register in pr_regs for 64e cpus.

Signed-off-by: Xiongwei Song &lt;sxwjean@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210807010239.416055-3-sxwjean@me.com

</content>
</entry>
<entry>
<title>powerpc/32: Fix critical and debug interrupts on BOOKE</title>
<updated>2021-08-06T22:53:59Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-07-07T05:55:07Z</published>
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<id>urn:sha1:b5cfc9cd7b0426e94ffd9e9ed79d1b00ace7780a</id>
<content type='text'>
32 bits BOOKE have special interrupts for debug and other
critical events.

When handling those interrupts, dedicated registers are saved
in the stack frame in addition to the standard registers, leading
to a shift of the pt_regs struct.

Since commit db297c3b07af ("powerpc/32: Don't save thread.regs on
interrupt entry"), the pt_regs struct is expected to be at the
same place all the time.

Instead of handling a special struct in addition to pt_regs, just
add those special registers to struct pt_regs.

Fixes: db297c3b07af ("powerpc/32: Don't save thread.regs on interrupt entry")
Cc: stable@vger.kernel.org
Reported-by: Radu Rendec &lt;radu.rendec@gmail.com&gt;
Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/028d5483b4851b01ea4334d0751e7f260419092b.1625637264.git.christophe.leroy@csgroup.eu

</content>
</entry>
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