linux-dev/arch/powerpc/kernel/cpu_setup_44x.S, branch linus/master

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

powerpc/44x: Add support for the AMCC APM821xx SoC

2010-10-13T12:47:09Z

This patch adds CPU, device tree, defconfig and bluestone board support for APM821xx SoC. Signed-off-by: Tirumala R Marri Signed-off-by: Josh Boyer

AMCC PPC 460SX redwood SoC platform initial framework

2009-02-14T19:41:29Z

This patch contains initial framework for the AMCC Redwood board. Signed-off-by: Madhulika Madishetty Signed-off-by: Tirumala Marri Signed-off-by: Feng Kan Signed-off-by: Vidhyananth Venkatasamy Signed-off-by: Preetesh Parekh Acked-by: Loc Ho Acked-by: Feng Kan Signed-off-by: Josh Boyer

powerpc/virtex5: Fix Virtex5 machine check handling

2008-12-05T19:34:26Z

The 440x5 core in the Virtex5 uses the 440A type machine check (ie, they have MCSRR0/MCSRR1). They thus need to call the appropriate fixup function to hook the right variant of the exception. Without this, all machine checks become fatal due to loss of context when entering the exception handler. Signed-off-by: Grant Likely Signed-off-by: Josh Boyer

powerpc/44x: Fix 460EX/460GT machine check handling

2008-11-13T15:11:26Z

Those cores use the 440A type machine check (ie, they have MCSRR0/MCSRR1). They thus need to call the appropriate fixup function to hook the right variant of the exception. Without this, all machine checks become fatal due to loss of context when entering the exception handler. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer

powerpc: Remove use of CONFIG_PPC_MERGE

2008-08-04T03:18:17Z

Now that arch/ppc is gone and CONFIG_PPC_MERGE is always set, remove the dead code associated with !CONFIG_PPC_MERGE from arch/powerpc and include/asm-powerpc. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras

Revert "[POWERPC] 4xx: Fix 460GT support to not enable FPU"

2008-06-11T11:52:40Z

This reverts commit acb0142bf01c0ebe18f09e37814451ee6a873e27. AMCC has indicated that the PPC 460GT does have FPU support. This revert enables the FPU for those chips again. Signed-off-by: Josh Boyer

[POWERPC] 4xx: Fix 460GT support to not enable FPU

2008-04-24T18:32:47Z

The AMCC 460GT doesn't have an FPU so let's not enable support for it. Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer

[POWERPC] 4xx: Add AMCC 460EX/460GT support to cputable.c & cpu_setup_44x.S

2008-03-26T12:19:16Z

This patch adds basic support for the AMCC 460EX/460GT PPC's to arch/powerpc. Currently those PPC's are still based on a 440 core and *not* a 460 core. Here some basic features of those SoC's: 460EX: - Up to 1.2GHz, 32kB L1 I-cache and D-cache, 256kB L2-cache, FPU - 1 * PCI (max 66MHz), 2 * PCIe (one 4-lane, one 1-lane) - 2 * GBit Ethernet with TCP/IP acceleration - USB 2.0 Host/Device OTG and Host interface - SATA controller - Optional security feature 460GT (only changes to 460EX): - 4 * GBit Ethernet with TCP/IP acceleration - RapidIO - No SATA - No USB Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer

[POWERPC] 4xx: Fix 440grx setup function to call 440A fixup

2007-12-23T19:27:37Z

The mechanism to do the setup for 440A cores changed recently. This fixes the 440grx setup function to call __fixup_440A_mcheck. Signed-off-by: Josh Boyer