<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/powerpc/lib/test_emulate_step.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/powerpc/lib/test_emulate_step.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/powerpc/lib/test_emulate_step.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-12-09T11:41:21Z</updated>
<entry>
<title>powerpc/inst: Define ppc_inst_t</title>
<updated>2021-12-09T11:41:21Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-11-29T17:49:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c545b9f040f341038d5228932140fb17e0c156e2'/>
<id>urn:sha1:c545b9f040f341038d5228932140fb17e0c156e2</id>
<content type='text'>
In order to stop using 'struct ppc_inst' on PPC32,
define a ppc_inst_t typedef.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/fe5baa2c66fea9db05a8b300b3e8d2880a42596c.1638208156.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/64s: avoid reloading (H)SRR registers if they are still valid</title>
<updated>2021-06-24T14:06:55Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2021-06-17T15:51:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=59dc5bfca0cb6a29db1a50847684eb5c19f8f400'/>
<id>urn:sha1:59dc5bfca0cb6a29db1a50847684eb5c19f8f400</id>
<content type='text'>
When an interrupt is taken, the SRR registers are set to return to where
it left off. Unless they are modified in the meantime, or the return
address or MSR are modified, there is no need to reload these registers
when returning from interrupt.

Introduce per-CPU flags that track the validity of SRR and HSRR
registers. These are cleared when returning from interrupt, when
using the registers for something else (e.g., OPAL calls), when
adjusting the return address or MSR of a context, and when context
switching (which changes the return address and MSR).

This improves the performance of interrupt returns.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Fold in fixup patch from Nick]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210617155116.2167984-5-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc: Replace PPC_INST_NOP by PPC_RAW_NOP()</title>
<updated>2021-06-15T14:16:49Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-05-20T10:23:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f30becb5e9ec086257162f78be491c0920c616b7'/>
<id>urn:sha1:f30becb5e9ec086257162f78be491c0920c616b7</id>
<content type='text'>
On the road to removing all PPC_INST_xx defines in
asm/ppc-opcodes.h, change PPC_INST_NOP to PPC_RAW_NOP().

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/ad46c195ca1b8572629ef07ba6bfe247585239a6.1621506159.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc: Rework PPC_RAW_xxx() macros for prefixed instructions</title>
<updated>2021-06-15T14:16:47Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2021-05-20T10:23:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=148a047602462ab04bff20f3529a255b0439d3df'/>
<id>urn:sha1:148a047602462ab04bff20f3529a255b0439d3df</id>
<content type='text'>
At the time being, we have PPC_RAW_PLXVP() and PPC_RAW_PSTXVP() which
provide a 64 bits value, and then it gets split by open coding to
format it into a 'struct ppc_inst' instruction.

Instead, define a PPC_RAW_xxx_P() and a PPC_RAW_xxx_S() to be used
as is.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/5d146b31b943e7ad674894421db4feef54804b9b.1621506159.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/sstep: Add tests for setb instruction</title>
<updated>2021-05-23T10:51:35Z</updated>
<author>
<name>Sathvika Vasireddy</name>
<email>sathvika@linux.vnet.ibm.com</email>
</author>
<published>2021-05-11T12:18:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=60060d704c55a9450208b8f0bc5026df9d4ab1d6'/>
<id>urn:sha1:60060d704c55a9450208b8f0bc5026df9d4ab1d6</id>
<content type='text'>
This adds selftests for setb instruction.

Signed-off-by: Sathvika Vasireddy &lt;sathvika@linux.vnet.ibm.com&gt;
Tested-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/b05b61ccb5f10279d46fed490796f32ea2ccc270.1620727160.git.sathvika@linux.vnet.ibm.com

</content>
</entry>
<entry>
<title>powerpc/sstep: Add testcases for VSX vector paired load/store instructions</title>
<updated>2020-12-10T13:09:10Z</updated>
<author>
<name>Balamuruhan S</name>
<email>bala24@linux.ibm.com</email>
</author>
<published>2020-10-11T05:09:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=35785b293da0070a8df19b0193f0e7de6c9eaecb'/>
<id>urn:sha1:35785b293da0070a8df19b0193f0e7de6c9eaecb</id>
<content type='text'>
Add testcases for VSX vector paired load/store instructions.
Sample o/p:

  emulate_step_test: lxvp           : PASS
  emulate_step_test: stxvp          : PASS
  emulate_step_test: lxvpx          : PASS
  emulate_step_test: stxvpx         : PASS
  emulate_step_test: plxvp          : PASS
  emulate_step_test: pstxvp         : PASS

Signed-off-by: Balamuruhan S &lt;bala24@linux.ibm.com&gt;
Signed-off-by: Ravi Bangoria &lt;ravi.bangoria@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201011050908.72173-6-ravi.bangoria@linux.ibm.com
</content>
</entry>
<entry>
<title>powerpc/test_emulate_step: Add testcases for divde[.] and divdeu[.] instructions</title>
<updated>2020-07-29T13:47:52Z</updated>
<author>
<name>Balamuruhan S</name>
<email>bala24@linux.ibm.com</email>
</author>
<published>2020-07-28T13:03:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b859c95cf4b936b5e8019e7ab68ee2740e609ffd'/>
<id>urn:sha1:b859c95cf4b936b5e8019e7ab68ee2740e609ffd</id>
<content type='text'>
Add testcases for divde, divde., divdeu, divdeu. emulated instructions
to cover few scenarios,
  - with same dividend and divisor to have undefine RT
    for divdeu[.]
  - with divide by zero to have undefine RT for both
    divde[.] and divdeu[.]
  - with negative dividend to cover -|divisor| &lt; r &lt;= 0 if
    the dividend is negative for divde[.]
  - normal case with proper dividend and divisor for both
    divde[.] and divdeu[.]

Signed-off-by: Balamuruhan S &lt;bala24@linux.ibm.com&gt;
Reviewed-by: Sandipan Das &lt;sandipan@linux.ibm.com&gt;
Acked-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200728130308.1790982-4-bala24@linux.ibm.com
</content>
</entry>
<entry>
<title>powerpc/test_emulate_sstep: Fix build error</title>
<updated>2020-07-24T00:41:19Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2020-07-23T23:02:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=70cc062c47e7851335ff4c44ba9b362174baf7d4'/>
<id>urn:sha1:70cc062c47e7851335ff4c44ba9b362174baf7d4</id>
<content type='text'>
ppc64_book3e_allmodconfig fails with:

  arch/powerpc/lib/test_emulate_step.c: In function 'test_pld':
  arch/powerpc/lib/test_emulate_step.c:113:7: error: implicit declaration of function 'cpu_has_feature'
    113 |  if (!cpu_has_feature(CPU_FTR_ARCH_31)) {
        |       ^~~~~~~~~~~~~~~

Add an include of cpu_has_feature.h to fix it.

Fixes: b6b54b42722a ("powerpc/sstep: Add tests for prefixed integer load/stores")
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200724004109.1461709-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>powerpc/test_emulate_step: Move extern declaration to sstep.h</title>
<updated>2020-07-23T07:43:14Z</updated>
<author>
<name>Balamuruhan S</name>
<email>bala24@linux.ibm.com</email>
</author>
<published>2020-06-26T09:51:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e93ad65e3611b06288efdf0cfd76c012df3feec1'/>
<id>urn:sha1:e93ad65e3611b06288efdf0cfd76c012df3feec1</id>
<content type='text'>
fix checkpatch.pl warnings by moving extern declaration from source
file to headerfile.

Signed-off-by: Balamuruhan S &lt;bala24@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200626095158.1031507-5-bala24@linux.ibm.com
</content>
</entry>
<entry>
<title>powerpc/test_emulate_step: Add negative tests for prefixed addi</title>
<updated>2020-07-23T07:43:07Z</updated>
<author>
<name>Balamuruhan S</name>
<email>bala24@linux.ibm.com</email>
</author>
<published>2020-06-26T09:51:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7e67c73b939b25d4ad18a536e52282aa35d8ee56'/>
<id>urn:sha1:7e67c73b939b25d4ad18a536e52282aa35d8ee56</id>
<content type='text'>
testcases for `paddi` instruction to cover the negative case,
if R is equal to 1 and RA is not equal to 0, the instruction
form is invalid.

Signed-off-by: Balamuruhan S &lt;bala24@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200626095158.1031507-3-bala24@linux.ibm.com
</content>
</entry>
</feed>
