<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/powerpc/platforms/pseries/msi.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/powerpc/platforms/pseries/msi.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/powerpc/platforms/pseries/msi.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-08T12:15:40Z</updated>
<entry>
<title>powerpc: Add missing headers</title>
<updated>2022-05-08T12:15:40Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2022-03-08T19:20:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e6f6390ab7b9d649c13de2c8a591bce61a10ec3b'/>
<id>urn:sha1:e6f6390ab7b9d649c13de2c8a591bce61a10ec3b</id>
<content type='text'>
Don't inherit headers "by chances" from asm/prom.h, asm/mpc52xx.h,
asm/pci.h etc...

Include the needed headers, and remove asm/prom.h when it was
needed exclusively for pulling necessary headers.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/be8bdc934d152a7d8ee8d1a840d5596e2f7d85e0.1646767214.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/pseries/msi: Let core code check for contiguous entries</title>
<updated>2021-12-16T21:16:40Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-10T22:19:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=651b39c48813acac2b77850014390f4062a4835d'/>
<id>urn:sha1:651b39c48813acac2b77850014390f4062a4835d</id>
<content type='text'>
Set the domain info flag and remove the check.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211210221814.720998720@linutronix.de


</content>
</entry>
<entry>
<title>PCI/MSI: Use msi_desc::msi_index</title>
<updated>2021-12-16T21:16:40Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-10T22:19:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=173ffad79d177d9a91fbf3be6bf67ca81e0f765a'/>
<id>urn:sha1:173ffad79d177d9a91fbf3be6bf67ca81e0f765a</id>
<content type='text'>
The usage of msi_desc::pci::entry_nr is confusing at best. It's the index
into the MSI[X] descriptor table.

Use msi_desc::msi_index which is shared between all MSI incarnations
instead of having a PCI specific storage for no value.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://lore.kernel.org/r/20211210221814.602911509@linutronix.de


</content>
</entry>
<entry>
<title>powerpc/pseries/msi: Use PCI device properties</title>
<updated>2021-12-16T21:16:38Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-10T22:18:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ed1533b5810141aceed2c2a3f13a17736f40e7fa'/>
<id>urn:sha1:ed1533b5810141aceed2c2a3f13a17736f40e7fa</id>
<content type='text'>
instead of fiddling with MSI descriptors.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211210221813.556202506@linutronix.de

</content>
</entry>
<entry>
<title>genirq/msi, treewide: Use a named struct for PCI/MSI attributes</title>
<updated>2021-12-09T10:52:21Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-06T22:27:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e58f2259b91c02974c20db7b28d39d810a21249b'/>
<id>urn:sha1:e58f2259b91c02974c20db7b28d39d810a21249b</id>
<content type='text'>
The unnamed struct sucks and is in the way of further cleanups. Stick the
PCI related MSI data into a real data structure and cleanup all users.

No functional change.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Juergen Gross &lt;jgross@suse.com&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Acked-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20211206210224.374863119@linutronix.de

</content>
</entry>
<entry>
<title>powerpc/pseries/msi: Add an empty irq_write_msi_msg() handler</title>
<updated>2021-10-07T12:33:25Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-09-30T10:25:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5a4b0320783a19f877dd595813569b3c25f4ff81'/>
<id>urn:sha1:5a4b0320783a19f877dd595813569b3c25f4ff81</id>
<content type='text'>
The IPR drivers tests for MSI support at probe time with MSI vector 0
and when done, frees the IRQ with free_irq(). This test was introduced
by 95fecd90397e ("ipr: add test for MSI interrupt support") as an
improvement of commit 5a9ef25b14d3 ("[SCSI] ipr: add MSI support")
because a boot failure was reported on a Bimini PowerPC system:

  https://lore.kernel.org/r/1242926159.3007.5.camel@localhost.localdomain

It was finally decided to remove MSI support on Bimini systems in
6eb0ac03899a ("powerpc/maple: Add a quirk to disable MSI for IPR on
Bimini").

Linux 5.15-rc1 added MSI domain support to the pseries machine and
when free_irq is called() in the driver, msi_domain_deactivate() also
is. This resets the MSI table entry of the associate vector by calling
__pci_write_msi_msg() with an empty message and breaks any further
activation of the same vector. In the case of the IPR driver, it
breaks the initialization sequence of the IOA.

Introduce an empty irq_write_msi_msg() handler in the MSI domain of
the pseries machine to avoid clearing the MSI vector entry. Updating
the entry is not strictly necessary since it is initialized by the
underlying hypervisor, PowerVM or QEMU/KVM.

Fixes: a5f3d2c17b07 ("powerpc/pseries/pci: Add MSI domains")
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reported-by: Abdul Haleem &lt;abdhalee@linux.vnet.ibm.com&gt;
Tested-by: Mahesh Salgaonkar &lt;mahesh@linux.ibm.com&gt;
[mpe: Tweak comment wording and formatting slightly]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210930102535.1047230-1-clg@kaod.org
</content>
</entry>
<entry>
<title>powerpc/pseries/pci: Drop unused MSI code</title>
<updated>2021-08-10T13:15:00Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3005123eea0daa18d98602ab64b2ce3ad087d849'/>
<id>urn:sha1:3005123eea0daa18d98602ab64b2ce3ad087d849</id>
<content type='text'>
MSIs should be fully managed by the PCI and IRQ subsystems now.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-25-clg@kaod.org

</content>
</entry>
<entry>
<title>powerpc/pci: Drop XIVE restriction on MSI domains</title>
<updated>2021-08-10T13:15:00Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=679e30b9536eeb93bc8c9a39c0ddc77dec536f6b'/>
<id>urn:sha1:679e30b9536eeb93bc8c9a39c0ddc77dec536f6b</id>
<content type='text'>
The PowerNV and pSeries platforms now have support for both the XICS
and XIVE IRQ domains.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-23-clg@kaod.org

</content>
</entry>
<entry>
<title>powerpc/pseries/pci: Add support of MSI domains to PHB hotplug</title>
<updated>2021-08-10T13:14:58Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=174db9e7f775ce06fc6949c9abbe758b3eb8171c'/>
<id>urn:sha1:174db9e7f775ce06fc6949c9abbe758b3eb8171c</id>
<content type='text'>
Simply allocate or release the MSI domains when a PHB is inserted in
or removed from the machine.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-11-clg@kaod.org

</content>
</entry>
<entry>
<title>powerpc/pseries/pci: Add a msi_free() handler to clear XIVE data</title>
<updated>2021-08-10T13:14:58Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2021-07-01T13:27:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9a014f456881e947bf8cdd8c984a207097e6c096'/>
<id>urn:sha1:9a014f456881e947bf8cdd8c984a207097e6c096</id>
<content type='text'>
The MSI domain clears the IRQ with msi_domain_free(), which calls
irq_domain_free_irqs_top(), which clears the handler data. This is a
problem for the XIVE controller since we need to unmap MMIO pages and
free a specific XIVE structure.

The 'msi_free()' handler is called before irq_domain_free_irqs_top()
when the handler data is still available. Use that to clear the XIVE
controller data.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210701132750.1475580-10-clg@kaod.org

</content>
</entry>
</feed>
