linux-dev/arch/riscv/include/asm/asm-extable.h, branch linus/master

riscv: extable: add a dedicated uaccess handler

2022-01-06T01:53:29Z

Inspired by commit 2e77a62cb3a6 ("arm64: extable: add a dedicated uaccess handler"), do similar to riscv to add a dedicated uaccess exception handler to update registers in exception context and subsequently return back into the function which faulted, so we remove the need for fixups specialized to each faulting instruction. Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt

riscv: extable: add `type` and `data` fields

2022-01-06T01:52:54Z

This is a riscv port of commit d6e2cc564775 ("arm64: extable: add `type` and `data` fields"). Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt

riscv: extable: consolidate definitions

2022-01-06T01:52:47Z

This is a riscv port of commit 819771cc2892 ("arm64: extable: consolidate definitions"). Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt