RISC-V: Split out the XIP fixups into their own file

2022-05-25T21:43:33Z

This was broken by the original refactoring (as the XIP definitions depend on ) and then more broken by the merge (as I accidentally took the old version). This fixes both breakages, while also pulling this out of to avoid polluting most assembly files with the XIP fixups. Fixes: bee7fbc38579 ("RISC-V CPU Idle Support") Fixes: 63b13e64a829 ("RISC-V: Add arch functions for non-retentive suspend entry/exit") Link: https://lore.kernel.org/r/20220420184056.7886-4-palmer@rivosinc.com Reviewed-by: Guo Ren Signed-off-by: Palmer Dabbelt

RISC-V: Add arch functions for non-retentive suspend entry/exit

2022-03-10T17:29:31Z

The hart registers and CSRs are not preserved in non-retentative suspend state so we provide arch specific helper functions which will save/restore hart context upon entry/exit to non-retentive suspend state. These helper functions can be used by cpuidle drivers for non-retentive suspend entry/exit. Signed-off-by: Anup Patel Signed-off-by: Anup Patel Reviewed-by: Guo Ren Signed-off-by: Palmer Dabbelt

linux-dev/arch/riscv/kernel/suspend_entry.S, branch linus/master

RISC-V: Split out the XIP fixups into their own file

RISC-V: Add arch functions for non-retentive suspend entry/exit