<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/riscv/mm/Makefile, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/riscv/mm/Makefile?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/riscv/mm/Makefile?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-07-28T22:30:51Z</updated>
<entry>
<title>riscv: Add support for non-coherent devices using zicbom extension</title>
<updated>2022-07-28T22:30:51Z</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2022-07-06T23:15:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1631ba1259d6d7f49b6028f2a1a0fa02be1c522a'/>
<id>urn:sha1:1631ba1259d6d7f49b6028f2a1a0fa02be1c522a</id>
<content type='text'>
The Zicbom ISA-extension was ratified in november 2021
and introduces instructions for dcache invalidate, clean
and flush operations.

Implement cache management operations for non-coherent devices
based on them.

Of course not all cores will support this, so implement an
alternative-based mechanism that replaces empty instructions
with ones done around Zicbom instructions.

As discussed in previous versions, assume the platform
being coherent by default so that non-coherent devices need
to get marked accordingly by firmware.

Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Link: https://lore.kernel.org/r/20220706231536.2041855-4-heiko@sntech.de
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>riscv: Fix config KASAN &amp;&amp; DEBUG_VIRTUAL</title>
<updated>2022-03-03T23:32:41Z</updated>
<author>
<name>Alexandre Ghiti</name>
<email>alexandre.ghiti@canonical.com</email>
</author>
<published>2022-02-25T12:39:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c648c4bb7d02ceb53ee40172fdc4433b37cee9c6'/>
<id>urn:sha1:c648c4bb7d02ceb53ee40172fdc4433b37cee9c6</id>
<content type='text'>
__virt_to_phys function is called very early in the boot process (ie
kasan_early_init) so it should not be instrumented by KASAN otherwise it
bugs.

Fix this by declaring phys_addr.c as non-kasan instrumentable.

Signed-off-by: Alexandre Ghiti &lt;alexandre.ghiti@canonical.com&gt;
Fixes: 8ad8b72721d0 (riscv: Add KASAN support)
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>riscv: Fixup patch_text panic in ftrace</title>
<updated>2021-01-14T23:09:04Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-12-17T16:01:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5ad84adf5456313e285734102367c861c436c5ed'/>
<id>urn:sha1:5ad84adf5456313e285734102367c861c436c5ed</id>
<content type='text'>
Just like arm64, we can't trace the function in the patch_text path.

Here is the bug log:

[   45.234334] Unable to handle kernel paging request at virtual address ffffffd38ae80900
[   45.242313] Oops [#1]
[   45.244600] Modules linked in:
[   45.247678] CPU: 0 PID: 11 Comm: migration/0 Not tainted 5.9.0-00025-g9b7db83-dirty #215
[   45.255797] epc: ffffffe00021689a ra : ffffffe00021718e sp : ffffffe01afabb58
[   45.262955]  gp : ffffffe00136afa0 tp : ffffffe01af94d00 t0 : 0000000000000002
[   45.270200]  t1 : 0000000000000000 t2 : 0000000000000001 s0 : ffffffe01afabc08
[   45.277443]  s1 : ffffffe0013718a8 a0 : 0000000000000000 a1 : ffffffe01afabba8
[   45.284686]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : c4c16ad38ae80900
[   45.291929]  a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000052464e43
[   45.299173]  s2 : 0000000000000001 s3 : ffffffe000206a60 s4 : ffffffe000206a60
[   45.306415]  s5 : 00000000000009ec s6 : ffffffe0013718a8 s7 : c4c16ad38ae80900
[   45.313658]  s8 : 0000000000000004 s9 : 0000000000000001 s10: 0000000000000001
[   45.320902]  s11: 0000000000000003 t3 : 0000000000000001 t4 : ffffffffd192fe79
[   45.328144]  t5 : ffffffffb8f80000 t6 : 0000000000040000
[   45.333472] status: 0000000200000100 badaddr: ffffffd38ae80900 cause: 000000000000000f
[   45.341514] ---[ end trace d95102172248fdcf ]---
[   45.346176] note: migration/0[11] exited with preempt_count 1

(gdb) x /2i $pc
=&gt; 0xffffffe00021689a &lt;__do_proc_dointvec+196&gt;: sd      zero,0(s7)
   0xffffffe00021689e &lt;__do_proc_dointvec+200&gt;: li      s11,0

(gdb) bt
0  __do_proc_dointvec (tbl_data=0x0, table=0xffffffe01afabba8,
write=0, buffer=0x0, lenp=0x7bf897061f9a0800, ppos=0x4, conv=0x0,
data=0x52464e43) at kernel/sysctl.c:581
1  0xffffffe00021718e in do_proc_dointvec (data=&lt;optimized out&gt;,
conv=&lt;optimized out&gt;, ppos=&lt;optimized out&gt;, lenp=&lt;optimized out&gt;,
buffer=&lt;optimized out&gt;, write=&lt;optimized out&gt;, table=&lt;optimized out&gt;)
at kernel/sysctl.c:964
2  proc_dointvec_minmax (ppos=&lt;optimized out&gt;, lenp=&lt;optimized out&gt;,
buffer=&lt;optimized out&gt;, write=&lt;optimized out&gt;, table=&lt;optimized out&gt;)
at kernel/sysctl.c:964
3  proc_do_static_key (table=&lt;optimized out&gt;, write=1, buffer=0x0,
lenp=0x0, ppos=0x7bf897061f9a0800) at kernel/sysctl.c:1643
4  0xffffffe000206792 in ftrace_make_call (rec=&lt;optimized out&gt;,
addr=&lt;optimized out&gt;) at arch/riscv/kernel/ftrace.c:109
5  0xffffffe0002c9c04 in __ftrace_replace_code
(rec=0xffffffe01ae40c30, enable=3) at kernel/trace/ftrace.c:2503
6  0xffffffe0002ca0b2 in ftrace_replace_code (mod_flags=&lt;optimized
out&gt;) at kernel/trace/ftrace.c:2530
7  0xffffffe0002ca26a in ftrace_modify_all_code (command=5) at
kernel/trace/ftrace.c:2677
8  0xffffffe0002ca30e in __ftrace_modify_code (data=&lt;optimized out&gt;)
at kernel/trace/ftrace.c:2703
9  0xffffffe0002c13b0 in multi_cpu_stop (data=0x0) at kernel/stop_machine.c:224
10 0xffffffe0002c0fde in cpu_stopper_thread (cpu=&lt;optimized out&gt;) at
kernel/stop_machine.c:491
11 0xffffffe0002343de in smpboot_thread_fn (data=0x0) at kernel/smpboot.c:165
12 0xffffffe00022f8b4 in kthread (_create=0xffffffe01af0c040) at
kernel/kthread.c:292
13 0xffffffe000201fac in handle_exception () at arch/riscv/kernel/entry.S:236

   0xffffffe00020678a &lt;+114&gt;:   auipc   ra,0xffffe
   0xffffffe00020678e &lt;+118&gt;:   jalr    -118(ra) # 0xffffffe000204714 &lt;patch_text_nosync&gt;
   0xffffffe000206792 &lt;+122&gt;:   snez    a0,a0

(gdb) disassemble patch_text_nosync
Dump of assembler code for function patch_text_nosync:
   0xffffffe000204714 &lt;+0&gt;:     addi    sp,sp,-32
   0xffffffe000204716 &lt;+2&gt;:     sd      s0,16(sp)
   0xffffffe000204718 &lt;+4&gt;:     sd      ra,24(sp)
   0xffffffe00020471a &lt;+6&gt;:     addi    s0,sp,32
   0xffffffe00020471c &lt;+8&gt;:     auipc   ra,0x0
   0xffffffe000204720 &lt;+12&gt;:    jalr    -384(ra) # 0xffffffe00020459c &lt;patch_insn_write&gt;
   0xffffffe000204724 &lt;+16&gt;:    beqz    a0,0xffffffe00020472e &lt;patch_text_nosync+26&gt;
   0xffffffe000204726 &lt;+18&gt;:    ld      ra,24(sp)
   0xffffffe000204728 &lt;+20&gt;:    ld      s0,16(sp)
   0xffffffe00020472a &lt;+22&gt;:    addi    sp,sp,32
   0xffffffe00020472c &lt;+24&gt;:    ret
   0xffffffe00020472e &lt;+26&gt;:    sd      a0,-24(s0)
   0xffffffe000204732 &lt;+30&gt;:    auipc   ra,0x4
   0xffffffe000204736 &lt;+34&gt;:    jalr    -1464(ra) # 0xffffffe00020817a &lt;flush_icache_all&gt;
   0xffffffe00020473a &lt;+38&gt;:    ld      a0,-24(s0)
   0xffffffe00020473e &lt;+42&gt;:    ld      ra,24(sp)
   0xffffffe000204740 &lt;+44&gt;:    ld      s0,16(sp)
   0xffffffe000204742 &lt;+46&gt;:    addi    sp,sp,32
   0xffffffe000204744 &lt;+48&gt;:    ret

(gdb) disassemble flush_icache_all-4
Dump of assembler code for function flush_icache_all:
   0xffffffe00020817a &lt;+0&gt;:     addi    sp,sp,-8
   0xffffffe00020817c &lt;+2&gt;:     sd      ra,0(sp)
   0xffffffe00020817e &lt;+4&gt;:     auipc   ra,0xfffff
   0xffffffe000208182 &lt;+8&gt;:     jalr    -1822(ra) # 0xffffffe000206a60 &lt;ftrace_caller&gt;
   0xffffffe000208186 &lt;+12&gt;:    ld      ra,0(sp)
   0xffffffe000208188 &lt;+14&gt;:    addi    sp,sp,8
   0xffffffe00020818a &lt;+0&gt;:     addi    sp,sp,-16
   0xffffffe00020818c &lt;+2&gt;:     sd      s0,0(sp)
   0xffffffe00020818e &lt;+4&gt;:     sd      ra,8(sp)
   0xffffffe000208190 &lt;+6&gt;:     addi    s0,sp,16
   0xffffffe000208192 &lt;+8&gt;:     li      a0,0
   0xffffffe000208194 &lt;+10&gt;:    auipc   ra,0xfffff
   0xffffffe000208198 &lt;+14&gt;:    jalr    -410(ra) # 0xffffffe000206ffa &lt;sbi_remote_fence_i&gt;
   0xffffffe00020819c &lt;+18&gt;:    ld      s0,0(sp)
   0xffffffe00020819e &lt;+20&gt;:    ld      ra,8(sp)
   0xffffffe0002081a0 &lt;+22&gt;:    addi    sp,sp,16
   0xffffffe0002081a2 &lt;+24&gt;:    ret

(gdb) frame 5
(rec=0xffffffe01ae40c30, enable=3) at kernel/trace/ftrace.c:2503
2503                    return ftrace_make_call(rec, ftrace_addr);
(gdb) p /x rec-&gt;ip
$2 = 0xffffffe00020817a -&gt; flush_icache_all !

When we modified flush_icache_all's patchable-entry with ftrace_caller:
 - Insert ftrace_caller at flush_icache_all prologue.
 - Call flush_icache_all to sync I/Dcache, but flush_icache_all is
just we modified by half.

Link: https://lore.kernel.org/linux-riscv/CAJF2gTT=oDWesWe0JVWvTpGi60-gpbNhYLdFWN_5EbyeqoEDdw@mail.gmail.com/T/#t
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Fixup wrong ftrace remove cflag</title>
<updated>2021-01-14T23:09:03Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-12-17T16:01:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=67d945778099b14324811fe67c5aff2cda7a7ad5'/>
<id>urn:sha1:67d945778099b14324811fe67c5aff2cda7a7ad5</id>
<content type='text'>
We must use $(CC_FLAGS_FTRACE) instead of directly using -pg. It
will cause -fpatchable-function-entry error.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Allow building with kcov coverage</title>
<updated>2020-07-30T18:37:35Z</updated>
<author>
<name>Tobias Klauser</name>
<email>tklauser@distanz.ch</email>
</author>
<published>2020-06-26T12:40:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=20d38f7c45a44e4b762b586a7bcacbc93ddb3153'/>
<id>urn:sha1:20d38f7c45a44e4b762b586a7bcacbc93ddb3153</id>
<content type='text'>
Add ARCH_HAS_KCOV and HAVE_GCC_PLUGINS to the riscv Kconfig.
Also disable instrumentation of some early boot code and vdso.

Boot-tested on QEMU's riscv64 virt machine.

Signed-off-by: Tobias Klauser &lt;tklauser@distanz.ch&gt;
Acked-by: Dmitry Vyukov &lt;dvyukov@google.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Add support to dump the kernel page tables</title>
<updated>2020-03-26T16:29:49Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-03-12T02:58:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=59c4da8640ccf4721d54d36835706f3eefb521a4'/>
<id>urn:sha1:59c4da8640ccf4721d54d36835706f3eefb521a4</id>
<content type='text'>
In a similar manner to arm64, x86, powerpc, etc., it can traverse all
page tables, and dump the page table layout with the memory types and
permissions.

Add a debugfs file at /sys/kernel/debug/kernel_page_tables to export
the page table layout to userspace.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Tested-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: add ARCH_HAS_SET_MEMORY support</title>
<updated>2020-03-26T16:24:30Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-03-09T16:55:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d3ab332a5021235a74fd832a49c6a99404920d88'/>
<id>urn:sha1:d3ab332a5021235a74fd832a49c6a99404920d88</id>
<content type='text'>
Add set_memory_ro/rw/x/nx architecture hooks to change the page
attribution.

Use own set_memory.h rather than generic set_memory.h
(i.e. include/asm-generic/set_memory.h), because we want to add other
function prototypes here.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: mm: add support for CONFIG_DEBUG_VIRTUAL</title>
<updated>2020-01-23T18:40:06Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-01-02T03:12:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6435f773d81f02193228685a7e3fe65c983c5de0'/>
<id>urn:sha1:6435f773d81f02193228685a7e3fe65c983c5de0</id>
<content type='text'>
This patch implements CONFIG_DEBUG_VIRTUAL to do additional checks on
virt_to_phys and __pa_symbol calls. virt_to_phys used for linear mapping
check, and __pa_symbol used for kernel symbol check. In current RISC-V,
kernel image maps to linear mapping area. If CONFIG_DEBUG_VIRTUAL is
disable, these two functions calculate the offset on the address feded
directly without any checks.

The result of test_debug_virtual as follows:

[    0.358456] ------------[ cut here ]------------
[    0.358738] virt_to_phys used for non-linear address: (____ptrval____) (0xffffffd000000000)
[    0.359174] WARNING: CPU: 0 PID: 1 at arch/riscv/mm/physaddr.c:16 __virt_to_phys+0x3c/0x50
[    0.359409] Modules linked in:
[    0.359630] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.5.0-rc3-00002-g5133c5c0ca13 #57
[    0.359861] epc: ffffffe000253d1a ra : ffffffe000253d1a sp : ffffffe03aa87da0
[    0.360019]  gp : ffffffe000ae03b0 tp : ffffffe03aa88000 t0 : ffffffe000af2660
[    0.360175]  t1 : 0000000000000064 t2 : 00000000000000b7 s0 : ffffffe03aa87dc0
[    0.360330]  s1 : ffffffd000000000 a0 : 000000000000004f a1 : 0000000000000000
[    0.360492]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : ffffffe000a84358
[    0.360672]  a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
[    0.360876]  s2 : ffffffe000ae0600 s3 : ffffffe00000fc7c s4 : ffffffe0000224b0
[    0.361067]  s5 : ffffffe000030890 s6 : ffffffe000022470 s7 : 0000000000000008
[    0.361267]  s8 : ffffffe0000002c4 s9 : ffffffe000ae0640 s10: ffffffe000ae0630
[    0.361453]  s11: 0000000000000000 t3 : 0000000000000000 t4 : 000000000001e6d0
[    0.361636]  t5 : ffffffe000ae0a18 t6 : ffffffe000aee54e
[    0.361806] status: 0000000000000120 badaddr: 0000000000000000 cause: 0000000000000003
[    0.362056] ---[ end trace aec0bf78d4978122 ]---
[    0.362404] PA: 0xfffffff080200000 for VA: 0xffffffd000000000
[    0.362607] PA: 0x00000000baddd2d0 for VA: 0xffffffe03abdd2d0

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Tested-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Add KASAN support</title>
<updated>2020-01-22T21:09:58Z</updated>
<author>
<name>Nick Hu</name>
<email>nickhu@andestech.com</email>
</author>
<published>2020-01-06T18:38:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8ad8b72721d0f07fa02dbe71f901743f9c71c8e6'/>
<id>urn:sha1:8ad8b72721d0f07fa02dbe71f901743f9c71c8e6</id>
<content type='text'>
This patch ports the feature Kernel Address SANitizer (KASAN).

Note: The start address of shadow memory is at the beginning of kernel
space, which is 2^64 - (2^39 / 2) in SV39. The size of the kernel space is
2^38 bytes so the size of shadow memory should be 2^38 / 8. Thus, the
shadow memory would not overlap with the fixmap area.

There are currently two limitations in this port,

1. RV64 only: KASAN need large address space for extra shadow memory
region.

2. KASAN can't debug the modules since the modules are allocated in VMALLOC
area. We mapped the shadow memory, which corresponding to VMALLOC area, to
the kasan_early_shadow_page because we don't have enough physical space for
all the shadow memory corresponding to VMALLOC area.

Signed-off-by: Nick Hu &lt;nickhu@andestech.com&gt;
Reported-by: Greentime Hu &lt;green.hu@gmail.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: move sifive_l2_cache.c to drivers/soc</title>
<updated>2019-12-20T11:40:24Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2019-11-07T09:20:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9209fb51896fe0eef8dfac85afe1f357e9265c0d'/>
<id>urn:sha1:9209fb51896fe0eef8dfac85afe1f357e9265c0d</id>
<content type='text'>
The sifive_l2_cache.c is in no way related to RISC-V architecture
memory management.  It is a little stub driver working around the fact
that the EDAC maintainers prefer their drivers to be structured in a
certain way that doesn't fit the SiFive SOCs.

Move the file to drivers/soc and add a Kconfig option for it, as well
as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE.

Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
[paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code]
Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</content>
</entry>
</feed>
