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<title>linux-dev/arch/sparc64/kernel/cherrs.S, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/sparc64/kernel/cherrs.S?h=master</id>
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<updated>2008-12-04T17:17:21Z</updated>
<entry>
<title>sparc,sparc64: unify kernel/</title>
<updated>2008-12-04T17:17:21Z</updated>
<author>
<name>Sam Ravnborg</name>
<email>sam@ravnborg.org</email>
</author>
<published>2008-12-03T11:11:52Z</published>
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<id>urn:sha1:a88b5ba8bd8ac18aad65ee6c6a254e2e74876db3</id>
<content type='text'>
o Move all files from sparc64/kernel/ to sparc/kernel
  - rename as appropriate
o Update sparc/Makefile to the changes
o Update sparc/kernel/Makefile to include the sparc64 files

NOTE: This commit changes link order on sparc64!

Link order had to change for either of sparc32 and sparc64.
And assuming sparc64 see more testing than sparc32 change link
order on sparc64 where issues will be caught faster.

Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Make %pil level 15 a pseudo-NMI.</title>
<updated>2008-12-04T17:17:02Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2008-11-24T05:55:29Z</published>
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<id>urn:sha1:b4f4372f96e0573d752d9e45beda02fabf716cc8</id>
<content type='text'>
So that we can profile code even in a local_irq_disable() section,
only write 14 (instead of 15) into the %pil register to disable IRQs.

This allows PIL level 15 to serve as a pseudo NMI.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Split entry.S up into seperate files.</title>
<updated>2008-04-28T07:47:20Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2008-04-28T07:47:20Z</published>
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<id>urn:sha1:6eda3a75928a3dc1072dfffd228ab818869d83ad</id>
<content type='text'>
entry.S was a hodge-podge of several totally unrelated
sets of assembler routines, ranging from FPU trap handlers
to hypervisor call functions.

Split it up into topic-sized pieces.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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