<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/x86/kernel/cpu/mce/internal.h, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/x86/kernel/cpu/mce/internal.h?h=linus%2Fmaster</id>
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<updated>2022-02-23T10:09:25Z</updated>
<entry>
<title>x86/mce: Remove the tolerance level control</title>
<updated>2022-02-23T10:09:25Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-12-20T20:43:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7f1b8e0d6360178e3527d4f14e6921c254a86035'/>
<id>urn:sha1:7f1b8e0d6360178e3527d4f14e6921c254a86035</id>
<content type='text'>
This is pretty much unused and not really useful. What is more, all
relevant MCA hardware has recoverable machine checks support so there's
no real need to tweak MCA tolerance levels in order to *maybe* extend
machine lifetime.

So rip it out.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/YcDq8PxvKtTENl/e@zn.tnic
</content>
</entry>
<entry>
<title>x86/mce: Work around an erratum on fast string copy instructions</title>
<updated>2022-02-19T13:26:42Z</updated>
<author>
<name>Jue Wang</name>
<email>juew@google.com</email>
</author>
<published>2022-02-18T01:32:09Z</published>
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<id>urn:sha1:8ca97812c3c830573f965a07bbd84223e8c5f5bd</id>
<content type='text'>
A rare kernel panic scenario can happen when the following conditions
are met due to an erratum on fast string copy instructions:

1) An uncorrected error.
2) That error must be in first cache line of a page.
3) Kernel must execute page_copy from the page immediately before that
page.

The fast string copy instructions ("REP; MOVS*") could consume an
uncorrectable memory error in the cache line _right after_ the desired
region to copy and raise an MCE.

Bit 0 of MSR_IA32_MISC_ENABLE can be cleared to disable fast string
copy and will avoid such spurious machine checks. However, that is less
preferable due to the permanent performance impact. Considering memory
poison is rare, it's desirable to keep fast string copy enabled until an
MCE is seen.

Intel has confirmed the following:
1. The CPU erratum of fast string copy only applies to Skylake,
Cascade Lake and Cooper Lake generations.

Directly return from the MCE handler:
2. Will result in complete execution of the "REP; MOVS*" with no data
loss or corruption.
3. Will not result in another MCE firing on the next poisoned cache line
due to "REP; MOVS*".
4. Will resume execution from a correct point in code.
5. Will result in the same instruction that triggered the MCE firing a
second MCE immediately for any other software recoverable data fetch
errors.
6. Is not safe without disabling the fast string copy, as the next fast
string copy of the same buffer on the same CPU would result in a PANIC
MCE.

This should mitigate the erratum completely with the only caveat that
the fast string copy is disabled on the affected hyper thread thus
performance degradation.

This is still better than the OS crashing on MCEs raised on an
irrelevant process due to "REP; MOVS*' accesses in a kernel context,
e.g., copy_page.

Tested:

Injected errors on 1st cache line of 8 anonymous pages of process
'proc1' and observed MCE consumption from 'proc2' with no panic
(directly returned).

Without the fix, the host panicked within a few minutes on a
random 'proc2' process due to kernel access from copy_page.

  [ bp: Fix comment style + touch ups, zap an unlikely(), improve the
    quirk function's readability. ]

Signed-off-by: Jue Wang &lt;juew@google.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20220218013209.2436006-1-juew@google.com
</content>
</entry>
<entry>
<title>x86/mce: Use arch atomic and bit helpers</title>
<updated>2022-02-13T21:08:27Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2022-02-04T08:30:15Z</published>
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<id>urn:sha1:f11445ba7a1160b87615e3f863a9e66c85189399</id>
<content type='text'>
The arch helpers do not have explicit KASAN instrumentation. Use them in
noinstr code.

Inline a couple more functions with single call sites, while at it:

mce_severity_amd_smca() has a single call-site which is noinstr so force
the inlining and fix:

  vmlinux.o: warning: objtool: mce_severity_amd.constprop.0()+0xca: call to \
	  mce_severity_amd_smca() leaves .noinstr.text section

Always inline mca_msr_reg():

     text    data     bss     dec     hex filename
  16065240        128031326       36405368        180501934       ac23dae vmlinux.before
  16065240        128031294       36405368        180501902       ac23d8e vmlinux.after

and mce_no_way_out() as the latter one is used only once, to fix:

  vmlinux.o: warning: objtool: mce_read_aux()+0x53: call to mca_msr_reg() leaves .noinstr.text section
  vmlinux.o: warning: objtool: do_machine_check()+0xc9: call to mce_no_way_out() leaves .noinstr.text section

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Marco Elver &lt;elver@google.com&gt;
Link: https://lore.kernel.org/r/20220204083015.17317-4-bp@alien8.de
</content>
</entry>
<entry>
<title>x86/mce: Use mce_rdmsrl() in severity checking code</title>
<updated>2021-12-13T13:12:08Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-10-05T22:55:38Z</published>
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<id>urn:sha1:88f66a42353717e7fac31caf04f0acd2d7fbbf54</id>
<content type='text'>
MCA has its own special MSR accessors. Use them.

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/20211208111343.8130-4-bp@alien8.de
</content>
</entry>
<entry>
<title>Merge tag 'ras_core_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2021-11-01T22:12:04Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-11-01T22:12:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=158405e888133f89dc9ec3e179c33544acdcf22a'/>
<id>urn:sha1:158405e888133f89dc9ec3e179c33544acdcf22a</id>
<content type='text'>
Pull RAS updates from Borislav Petkov:

 - Get rid of a bunch of function pointers used in MCA land in favor of
   normal functions. This is in preparation of making the MCA code
   noinstr-aware

 - When the kernel copies data from user addresses and it encounters a
   machine check, a SIGBUS is sent to that process. Change this action
   to either an -EFAULT which is returned to the user or a short write,
   making the recovery action a lot more user-friendly

* tag 'ras_core_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce: Sort mca_config members to get rid of unnecessary padding
  x86/mce: Get rid of the -&gt;quirk_no_way_out() indirect call
  x86/mce: Get rid of msr_ops
  x86/mce: Get rid of machine_check_vector
  x86/mce: Get rid of the mce_severity function pointer
  x86/mce: Drop copyin special case for #MC
  x86/mce: Change to not send SIGBUS error during copy from user
</content>
</entry>
<entry>
<title>x86/mce: Sort mca_config members to get rid of unnecessary padding</title>
<updated>2021-09-23T09:38:04Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-09-22T16:44:17Z</published>
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<id>urn:sha1:15802468a95bd8ec9060eb861468f4a0f0106fa4</id>
<content type='text'>
$ pahole -C mca_config arch/x86/kernel/cpu/mce/core.o

before:

   /* size: 40, cachelines: 1, members: 16 */
   /* sum members: 21, holes: 1, sum holes: 3 */
   /* sum bitfield members: 64 bits, bit holes: 2, sum bit holes: 32 bits */
   /* padding: 4 */
   /* last cacheline: 40 bytes */

after:

   /* size: 32, cachelines: 1, members: 16 */
   /* padding: 3 */
   /* last cacheline: 32 bytes */

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lkml.kernel.org/r/20210922165101.18951-6-bp@alien8.de
</content>
</entry>
<entry>
<title>x86/mce: Get rid of the -&gt;quirk_no_way_out() indirect call</title>
<updated>2021-09-23T09:34:49Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-09-02T18:23:00Z</published>
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<id>urn:sha1:cc466666ab0920acfa879326ed9f7ef555323261</id>
<content type='text'>
Use a flag setting to call the only quirk function for that.

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lkml.kernel.org/r/20210922165101.18951-5-bp@alien8.de
</content>
</entry>
<entry>
<title>x86/mce: Get rid of msr_ops</title>
<updated>2021-09-23T09:20:20Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-09-02T11:33:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8121b8f947be0033f567619be204639a50cad298'/>
<id>urn:sha1:8121b8f947be0033f567619be204639a50cad298</id>
<content type='text'>
Avoid having indirect calls and use a normal function which returns the
proper MSR address based on -&gt;smca setting.

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lkml.kernel.org/r/20210922165101.18951-4-bp@alien8.de
</content>
</entry>
<entry>
<title>x86/mce: Get rid of machine_check_vector</title>
<updated>2021-09-23T09:15:49Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-09-01T19:40:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=cbe1de162d8297e941f01ac7dd399a11251352bc'/>
<id>urn:sha1:cbe1de162d8297e941f01ac7dd399a11251352bc</id>
<content type='text'>
Get rid of the indirect function pointer and use flags settings instead
to steer execution.

Now that it is not an indirect call any longer, drop the instrumentation
annotation for objtool too.

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lkml.kernel.org/r/20210922165101.18951-3-bp@alien8.de
</content>
</entry>
<entry>
<title>x86/mce: Get rid of the mce_severity function pointer</title>
<updated>2021-09-23T09:03:51Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-09-01T15:02:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=631adc7b0bbaa1333fc39f0dca5e7584f51d86c9'/>
<id>urn:sha1:631adc7b0bbaa1333fc39f0dca5e7584f51d86c9</id>
<content type='text'>
Turn it into a normal function which calls an AMD- or Intel-specific
variant depending on the CPU it runs on.

No functional changes.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lkml.kernel.org/r/20210922165101.18951-2-bp@alien8.de
</content>
</entry>
</feed>
