<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/x86/kernel/hpet.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/x86/kernel/hpet.c?h=linus%2Fmaster</id>
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<updated>2021-12-16T20:50:06Z</updated>
<entry>
<title>rtc: Check return value from mc146818_get_time()</title>
<updated>2021-12-16T20:50:06Z</updated>
<author>
<name>Mateusz Jończyk</name>
<email>mat.jonczyk@o2.pl</email>
</author>
<published>2021-12-10T20:01:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0dd8d6cb9eddfe637bcd821bbfd40ebd5a0737b9'/>
<id>urn:sha1:0dd8d6cb9eddfe637bcd821bbfd40ebd5a0737b9</id>
<content type='text'>
There are 4 users of mc146818_get_time() and none of them was checking
the return value from this function. Change this.

Print the appropriate warnings in callers of mc146818_get_time() instead
of in the function mc146818_get_time() itself, in order not to add
strings to rtc-mc146818-lib.c, which is kind of a library.

The callers of alpha_rtc_read_time() and cmos_read_time() may use the
contents of (struct rtc_time *) even when the functions return a failure
code. Therefore, set the contents of (struct rtc_time *) to 0x00,
which looks more sensible then 0xff and aligns with the (possibly
stale?) comment in cmos_read_time:

	/*
	 * If pm_trace abused the RTC for storage, set the timespec to 0,
	 * which tells the caller that this RTC value is unusable.
	 */

For consistency, do this in mc146818_get_time().

Note: hpet_rtc_interrupt() may call mc146818_get_time() many times a
second. It is very unlikely, though, that the RTC suddenly stops
working and mc146818_get_time() would consistently fail.

Only compile-tested on alpha.

Signed-off-by: Mateusz Jończyk &lt;mat.jonczyk@o2.pl&gt;
Cc: Richard Henderson &lt;rth@twiddle.net&gt;
Cc: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Cc: Matt Turner &lt;mattst88@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Cc: Alessandro Zummo &lt;a.zummo@towertech.it&gt;
Cc: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Cc: linux-alpha@vger.kernel.org
Cc: x86@kernel.org
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Link: https://lore.kernel.org/r/20211210200131.153887-4-mat.jonczyk@o2.pl
</content>
</entry>
<entry>
<title>x86/hpet: Use another crystalball to evaluate HPET usability</title>
<updated>2021-10-01T11:38:13Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-09-30T17:21:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6e3cd95234dc1eda488f4f487c281bac8fef4d9b'/>
<id>urn:sha1:6e3cd95234dc1eda488f4f487c281bac8fef4d9b</id>
<content type='text'>
On recent Intel systems the HPET stops working when the system reaches PC10
idle state.

The approach of adding PCI ids to the early quirks to disable HPET on
these systems is a whack a mole game which makes no sense.

Check for PC10 instead and force disable HPET if supported. The check is
overbroad as it does not take ACPI, intel_idle enablement and command
line parameters into account. That's fine as long as there is at least
PMTIMER available to calibrate the TSC frequency. The decision can be
overruled by adding "hpet=force" on the kernel command line.

Remove the related early PCI quirks for affected Ice Cake and Coffin Lake
systems as they are not longer required. That should also cover all
other systems, i.e. Tiger Rag and newer generations, which are most
likely affected by this as well.

Fixes: Yet another hardware trainwreck
Reported-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Reviewed-by: Rafael J. Wysocki &lt;rafael@kernel.org&gt;
Cc: stable@vger.kernel.org
Cc: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>x86/msi: Force affinity setup before startup</title>
<updated>2021-08-10T08:59:21Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-07-29T21:51:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ff363f480e5997051dd1de949121ffda3b753741'/>
<id>urn:sha1:ff363f480e5997051dd1de949121ffda3b753741</id>
<content type='text'>
The X86 MSI mechanism cannot handle interrupt affinity changes safely after
startup other than from an interrupt handler, unless interrupt remapping is
enabled. The startup sequence in the generic interrupt code violates that
assumption.

Mark the irq chips with the new IRQCHIP_AFFINITY_PRE_STARTUP flag so that
the default interrupt setting happens before the interrupt is started up
for the first time.

While the interrupt remapping MSI chip does not require this, there is no
point in treating it differently as this might spare an interrupt to a CPU
which is not in the default affinity mask.

For the non-remapping case go to the direct write path when the interrupt
is not yet started similar to the not yet activated case.

Fixes: 18404756765c ("genirq: Expose default irq affinity mask (take 3)")
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210729222542.886722080@linutronix.de


</content>
</entry>
<entry>
<title>x86/hpet: Use irq_find_matching_fwspec() to find remapping irqdomain</title>
<updated>2020-10-28T19:26:28Z</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw@amazon.co.uk</email>
</author>
<published>2020-10-24T21:35:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c2a5881c28e5bb4cb901029423a1c7068c0afa2d'/>
<id>urn:sha1:c2a5881c28e5bb4cb901029423a1c7068c0afa2d</id>
<content type='text'>
All possible parent domains have a select method now. Make use of it.

Signed-off-by: David Woodhouse &lt;dwmw@amazon.co.uk&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20201024213535.443185-28-dwmw2@infradead.org

</content>
</entry>
<entry>
<title>x86/hpet: Move MSI support into hpet.c</title>
<updated>2020-10-28T19:26:25Z</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw@amazon.co.uk</email>
</author>
<published>2020-10-24T21:35:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3d7295eb3003aea9f89de35304b3a88ae4d5036b'/>
<id>urn:sha1:3d7295eb3003aea9f89de35304b3a88ae4d5036b</id>
<content type='text'>
This isn't really dependent on PCI MSI; it's just generic MSI which is now
supported by the generic x86_vector_domain. Move the HPET MSI support back
into hpet.c with the rest of the HPET support.

Signed-off-by: David Woodhouse &lt;dwmw@amazon.co.uk&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20201024213535.443185-11-dwmw2@infradead.org

</content>
</entry>
<entry>
<title>remove ioremap_nocache and devm_ioremap_nocache</title>
<updated>2020-01-06T08:45:59Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2020-01-06T08:43:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4bdc0d676a643140bdf17dbf7eafedee3d496a3c'/>
<id>urn:sha1:4bdc0d676a643140bdf17dbf7eafedee3d496a3c</id>
<content type='text'>
ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>x86/hpet: Undo the early counter is counting check</title>
<updated>2019-07-25T10:21:32Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-07-25T06:28:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=643d83f0a3518d6fbcf88f970de0340a5aa6b5a2'/>
<id>urn:sha1:643d83f0a3518d6fbcf88f970de0340a5aa6b5a2</id>
<content type='text'>
Rui reported that on a Pentium D machine which has HPET forced enabled
because it is not advertised by ACPI, the early counter is counting check
leads to a silent boot hang.

The reason is that the ordering of checking the counter first and then
reconfiguring the HPET fails to work on that machine. As the HPET is not
advertised and presumably not initialized by the BIOS the early enable and
the following reconfiguration seems to bring it into a broken state. Adding
clocksource=jiffies to the command line results in the following
clocksource watchdog warning:

  clocksource: timekeeping watchdog on CPU1:
  Marking clocksource 'tsc-early' as unstable because the skew is too large:
  clocksource:  'hpet' wd_now: 33 wd_last: 33 mask: ffffffff

That clearly shows that the HPET is not counting after it got reconfigured
and reenabled. If the counter is not working then the HPET timer is not
expiring either, which explains the boot hang.

Move the counter is counting check after the full configuration again to
unbreak these systems.

Reported-by: Rui Salvaterra &lt;rsalvaterra@gmail.com&gt;
Fixes: 3222daf970f3 ("x86/hpet: Separate counter check out of clocksource register code")
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Rui Salvaterra &lt;rsalvaterra@gmail.com&gt;
Link: https://lkml.kernel.org/r/alpine.DEB.2.21.1907250810530.1791@nanos.tec.linutronix.de

</content>
</entry>
<entry>
<title>x86/hpet: Use channel for legacy clockevent storage</title>
<updated>2019-06-27T22:57:27Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-23T13:24:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e44252f4fe79dd9ca93bcf4e8f74389a5b8452f5'/>
<id>urn:sha1:e44252f4fe79dd9ca93bcf4e8f74389a5b8452f5</id>
<content type='text'>
All preparations are done. Use the channel storage for the legacy
clockevent and remove the static variable.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Ricardo Neri &lt;ricardo.neri-calderon@linux.intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Andi Kleen &lt;andi.kleen@intel.com&gt;
Cc: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Ravi Shankar &lt;ravi.v.shankar@intel.com&gt;
Link: https://lkml.kernel.org/r/20190623132436.737689919@linutronix.de

</content>
</entry>
<entry>
<title>x86/hpet: Use common init for legacy clockevent</title>
<updated>2019-06-27T22:57:27Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-23T13:24:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=49adaa60fa75a04457d30f38321378cdc3547212'/>
<id>urn:sha1:49adaa60fa75a04457d30f38321378cdc3547212</id>
<content type='text'>
Replace the static initialization of the legacy clockevent with runtime
initialization utilizing the common init function as the last preparatory
step to switch the legacy clockevent over to the channel 0 storage in
hpet_base.

This comes with a twist. The static clockevent initializer has selected
support for periodic and oneshot mode unconditionally whether the HPET
config advertised periodic mode or not. Even the pre clockevents code did
this. But....

Using the conditional in hpet_init_clockevent() makes at least Qemu and one
hardware machine fail to boot.  There are two issues which cause the boot
failure:

 #1 After the timer delivery test in IOAPIC and the IOAPIC setup the next
    interrupt is not delivered despite the HPET channel being programmed
    correctly. Reprogramming the HPET after switching to IOAPIC makes it
    work again. After fixing this, the next issue surfaces:

 #2 Due to the unconditional periodic mode 'availability' the Local APIC
    timer calibration can hijack the global clockevents event handler
    without causing damage. Using oneshot at this stage makes if hang
    because the HPET does not get reprogrammed due to the handler
    hijacking. Duh, stupid me!

Both issues require major surgery and especially the kick HPET again after
enabling IOAPIC results in really nasty hackery.  This 'assume periodic
works' magic has survived since HPET support got added, so it's
questionable whether this should be fixed. Both Qemu and the failing
hardware machine support periodic mode despite the fact that both don't
advertise it in the configuration register and both need that extra kick
after switching to IOAPIC. Seems to be a feature...

Keep the 'assume periodic works' magic around and add a big fat comment.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Ricardo Neri &lt;ricardo.neri-calderon@linux.intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Andi Kleen &lt;andi.kleen@intel.com&gt;
Cc: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Ravi Shankar &lt;ravi.v.shankar@intel.com&gt;
Link: https://lkml.kernel.org/r/20190623132436.646565913@linutronix.de

</content>
</entry>
<entry>
<title>x86/hpet: Carve out shareable parts of init_one_hpet_msi_clockevent()</title>
<updated>2019-06-27T22:57:26Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-23T13:24:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ea99110dd024d2f31bde19dda049f3fbf3816a70'/>
<id>urn:sha1:ea99110dd024d2f31bde19dda049f3fbf3816a70</id>
<content type='text'>
To finally remove the static channel0/clockevent storage and to utilize the
channel 0 storage in hpet_base, it's required to run time initialize the
clockevent. The MSI clockevents already have a run time init function.

Carve out the parts which can be shared between the legacy and the MSI
implementation.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Ricardo Neri &lt;ricardo.neri-calderon@linux.intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Andi Kleen &lt;andi.kleen@intel.com&gt;
Cc: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Ravi Shankar &lt;ravi.v.shankar@intel.com&gt;
Link: https://lkml.kernel.org/r/20190623132436.552451082@linutronix.de

</content>
</entry>
</feed>
