<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/arch/xtensa/lib, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/arch/xtensa/lib?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/arch/xtensa/lib?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-02T02:51:22Z</updated>
<entry>
<title>xtensa: enable KCSAN</title>
<updated>2022-05-02T02:51:22Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-10-05T06:33:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=725aea873261e8d986e527838fde2a721f0962d8'/>
<id>urn:sha1:725aea873261e8d986e527838fde2a721f0962d8</id>
<content type='text'>
Prefix arch-specific barrier macros with '__' to make use of instrumented
generic macros.
Prefix arch-specific bitops with 'arch_' to make use of instrumented
generic functions.
Provide stubs for 64-bit atomics when building with KCSAN.
Disable KCSAN instrumentation in arch/xtensa/boot.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: Marco Elver &lt;elver@google.com&gt;
</content>
</entry>
<entry>
<title>xtensa: localize labels used in memmove</title>
<updated>2022-05-02T02:51:20Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2022-04-10T02:33:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1030c8792313b9dd219aa48f265b00d72938b116'/>
<id>urn:sha1:1030c8792313b9dd219aa48f265b00d72938b116</id>
<content type='text'>
Internal labels in the memmove implementation don't need to be visible,
localize them by prefixing their names with '.L'.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: add helpers for division, remainder and shifts</title>
<updated>2022-03-09T22:02:40Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2021-10-18T11:29:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dbf4ed894c0fd85d421f7b3b9758ce95398d2925'/>
<id>urn:sha1:dbf4ed894c0fd85d421f7b3b9758ce95398d2925</id>
<content type='text'>
Don't rely on libgcc presence, build own versions of the helpers with
correct ABI.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: don't use a12 in __xtensa_copy_user in call0 ABI</title>
<updated>2021-10-19T05:19:34Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2021-07-25T23:31:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=61a6b91283b4c9e308fcf9377d3f0598ceccb252'/>
<id>urn:sha1:61a6b91283b4c9e308fcf9377d3f0598ceccb252</id>
<content type='text'>
a12 is callee-saved register in xtensa call0 ABI, so a function must not
change it. The main unaligned copy loop of __xtensa_copy_user uses all
low-numbered registers, so a register must be spilled to avoid using a12
as a loop counter.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: don't use a12 in strncpy_user</title>
<updated>2021-10-19T05:19:34Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2021-07-25T23:31:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d191323bc02370667fede74228135440efd98d2b'/>
<id>urn:sha1:d191323bc02370667fede74228135440efd98d2b</id>
<content type='text'>
a12 is callee-saved register in xtensa call0 ABI, so a function must not
change it. a10 is not used in this function at all, use it instead of
a12 to avoid saving/restoring it.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: propagate the calling conventions change down into csum_partial_copy_generic()</title>
<updated>2020-08-20T19:45:21Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2020-07-19T22:03:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2a5d2bd159f33ef34484ee14705dcf8634061f2c'/>
<id>urn:sha1:2a5d2bd159f33ef34484ee14705dcf8634061f2c</id>
<content type='text'>
turn the exception handlers into returning 0.

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>xtensa: abstract 'entry' and 'retw' in assembly code</title>
<updated>2019-07-08T17:04:48Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-05-13T03:28:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a'/>
<id>urn:sha1:d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a</id>
<content type='text'>
Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros
that allocate aligned stack frame in windowed and call0 ABIs.
Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack
frame size when register spilling is involved.
Replace all uses of 'entry' and 'retw' with the above macros.
This makes most of the xtensa assembly code ready for XEA3 and call0 ABI.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152</title>
<updated>2019-05-30T18:26:32Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2874c5fd284268364ece81a7bd936f3c8168e567'/>
<id>urn:sha1:2874c5fd284268364ece81a7bd936f3c8168e567</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>xtensa: replace variant/core.h with asm/core.h</title>
<updated>2019-05-07T00:48:55Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2019-01-02T03:41:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8f8d5745bb520c76b81abef4a2cb3023d0313bfd'/>
<id>urn:sha1:8f8d5745bb520c76b81abef4a2cb3023d0313bfd</id>
<content type='text'>
Introduce the header arch/xtensa/include/asm/core.h that provides
definitions for XCHAL macros missing in older xtensa releases. Use this
header instead of variant/core.h

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
</feed>
