<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/acpi/acpica/rsserial.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/acpi/acpica/rsserial.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/acpi/acpica/rsserial.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-04-07T17:09:01Z</updated>
<entry>
<title>ACPICA: ACPI 6.4: add CSI2Bus resource template</title>
<updated>2021-04-07T17:09:01Z</updated>
<author>
<name>Bob Moore</name>
<email>robert.moore@intel.com</email>
</author>
<published>2021-04-06T21:30:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a2befbb2c3fbeccf4a04e9f0179cc28d5f5c1682'/>
<id>urn:sha1:a2befbb2c3fbeccf4a04e9f0179cc28d5f5c1682</id>
<content type='text'>
This commit the result of squashing the following:
ACPICA commit 21a316fdaa46b3fb245a1920f3829cb05d6ced6e
ACPICA commit f5506fc7dad08c2a25ef52cf836c2d67385a612c

Link: https://github.com/acpica/acpica/commit/21a316fd
Link: https://github.com/acpica/acpica/commit/f5506fc7
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Erik Kaneda &lt;erik.kaneda@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI/ACPICA: Trivial: fix spelling mistakes and fix whitespace formatting</title>
<updated>2019-02-24T20:12:01Z</updated>
<author>
<name>Erik Schmauss</name>
<email>erik.schmauss@intel.com</email>
</author>
<published>2019-02-15T21:36:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c163f90cc8620716b08ac7987c4c4ebf16444fd5'/>
<id>urn:sha1:c163f90cc8620716b08ac7987c4c4ebf16444fd5</id>
<content type='text'>
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: adding SPDX headers</title>
<updated>2018-03-18T18:08:05Z</updated>
<author>
<name>Erik Schmauss</name>
<email>erik.schmauss@intel.com</email>
</author>
<published>2018-03-14T23:13:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=95857638889aeea1b10a16b55041adf3e3ab84c4'/>
<id>urn:sha1:95857638889aeea1b10a16b55041adf3e3ab84c4</id>
<content type='text'>
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: All acpica: Update copyrights to 2018</title>
<updated>2018-02-06T09:31:20Z</updated>
<author>
<name>Bob Moore</name>
<email>robert.moore@intel.com</email>
</author>
<published>2018-01-04T18:06:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=da6f8320d58623eae9b6fa2f09b1b4f60a772ce9'/>
<id>urn:sha1:da6f8320d58623eae9b6fa2f09b1b4f60a772ce9</id>
<content type='text'>
including tool signons.

Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Erik Schmauss &lt;erik.schmauss@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroupConfig() resource</title>
<updated>2017-06-12T12:58:40Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=044b72395194965069da098d729110446855bb4d'/>
<id>urn:sha1:044b72395194965069da098d729110446855bb4d</id>
<content type='text'>
ACPICA commit 08b83591c0db751769d61fa889f4f50f575aeffb

PinGroupConfig() is analogous to PinGroupFunction() but instead of mode
(muxing), it is used to apply specific fine-grained configuration to a
set of referenced pins.

The format of this new resource is:

  PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
                  ResourceSource, ResourceSourceIndex, ResourceSourceLabel,
                  ResourceUsage, DescriptorName, VendorData)

The PinConfigType/PinConfigValue are the same used by PinConfig()
resource.

Here also the combination of ResourceSource and ResourceSourceLabel is
used to specify the PinGroup() this resource refers to.

Link: https://github.com/acpica/acpica/commit/08b83591
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroupFunction() resource</title>
<updated>2017-06-12T12:58:39Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f8a6c86644f6e07af0ac4e89adb4db29a640e40f'/>
<id>urn:sha1:f8a6c86644f6e07af0ac4e89adb4db29a640e40f</id>
<content type='text'>
ACPICA commit bd9a745749eac7137cd23085e6bdeb322de14ea2

PinGroupFunction() is a new resource introduced with ACPI 6.2. It is
used with PinGroup() to configure specific mode for a set of pins
exposed by a GPIO controller.

The format of the resource is:

  PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource,
                    ResourceSourceIndex, ResourceSourceLabel,
                    ResourceUsage, DescriptorName, VendorData)

The resource_source and ResourceSourceLabel fields are used to specify
the PinGroup() resource referenced by PinGroupFunction().

  Device (GPIO)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroup ("group1") {2, 3}
          PinGroup ("group2") {4, 5}
          ...
      })
  }

  Device (I2C)
  {
      Name (_CRS, ResourceTemplate () {
          PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2")
      })
  }

In the above example the PinGroupFunction() references the second
PinGroup() resource (using label "mygroup2" and configures pins 4 and 5
into mode 6.

Link: https://github.com/acpica/acpica/commit/bd9a7457
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinGroup() resource</title>
<updated>2017-06-12T12:58:39Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fdaa0980772cb05b53e7f544d513e3445f3f1021'/>
<id>urn:sha1:fdaa0980772cb05b53e7f544d513e3445f3f1021</id>
<content type='text'>
ACPICA commit 7d928e3174fb19d7dc0066b03c30bea07c001563

ACPI 6.2 introduced a new resource that is used to declare set of pins
belonging to a GPIO controller. This resource is referenced by new
PinGroupFunction() and PinGroupConfig() resources using ResourceSource
and ResourceLabel fields.

The PinGroup() resource looks like this:

  PinGroup (ResourceLabel, ResourceUsage, DescriptorName,
            VendorData) {Pin List}

This resource should be listed in _CRS under the GPIO/pincontroller
device providing these pins.

Link: https://github.com/acpica/acpica/commit/7d928e31
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinConfig() resource</title>
<updated>2017-06-12T12:58:39Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=97028ce6fca0fec53ee71e2fd5acfb2dc8430f1f'/>
<id>urn:sha1:97028ce6fca0fec53ee71e2fd5acfb2dc8430f1f</id>
<content type='text'>
ACPICA commit a06fdba686cefccd5dd5b93b52fa0f1e3f984906

ACPI 6.2 introduced a new resource that is used to specify fine-grained
configuration of a pin or set of pins used by a device. The ASL syntax of
this new resource looks like:

  PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
             ResourceSource, ResourceSourceIndex, ResourceUsage,
             DescriptorName, Vendordata) {Pin List}

PinConfigType is an integer with following accepted values:

  0x00 (Default) - No configuration is applied to the pin
  0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor
  0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor
  0x03 (Bias Default) - Set to default biasing
  0x04 (Bias Disable) - All bias settings will be disabled
  0x05 (Bias High Impedance) - Configure the pin as hi_z
  0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where
                         it drives the last value on a tristate bus
  0x07 (Drive Open Drain) - Configure the pin into open drain state
  0x08 (Drive Open Source) - Configure the pin into open source state
  0x09 (Drive Push Pull) - Configure the pin into push-pull state
  0x0a (Drive Strength) - How much the pin can supply current
  0x0b (Slew Rate) - Configure slew rate of the pin
  0x0c (Input Debounce) - Enable input debouncer for the pin
  0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin
  0x0e - 0x7f - Reserved
  0x80 - 0xff - Vendor defined types

The PinConfigValue depends on the type and is expressed as units
suitable for that type (for example bias uses Ohms).

Link: https://github.com/acpica/acpica/commit/a06fdba6
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: ACPI 6.2: Add support for PinFunction() resource</title>
<updated>2017-06-12T12:58:39Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2017-06-05T08:39:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2b72693066a867ac073a657e871bb64391b4ffdb'/>
<id>urn:sha1:2b72693066a867ac073a657e871bb64391b4ffdb</id>
<content type='text'>
ACPICA commit 6bbc6357f7061f1243601adde0ea45f7a89274e0

ACPI 6.2 introduced a new resource that is used to describe how certain
pins are muxed for a device. The ASL syntax of this new resource looks
like below:

  PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource,
              ResourceSourceIndex, ResourceUsage, DescriptorName,
              VendorData) {Pin List}

Which is pretty similar to GpioIo()/GpioInt() resources.

Teach ACPICA about this new resource.

Link: https://github.com/acpica/acpica/commit/6bbc6357
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: Source tree: Update copyright notices to 2017</title>
<updated>2017-02-09T13:47:02Z</updated>
<author>
<name>Bob Moore</name>
<email>robert.moore@intel.com</email>
</author>
<published>2017-02-08T03:00:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7735ca0eb4ebd6d47fdad40602d0ba7593219f8c'/>
<id>urn:sha1:7735ca0eb4ebd6d47fdad40602d0ba7593219f8c</id>
<content type='text'>
ACPICA commit 16577e5265923f4999b4d2c0addb2343b18135e1

Affects all files.

Link: https://github.com/acpica/acpica/commit/16577e52
Signed-off-by: Bob Moore &lt;robert.moore@intel.com&gt;
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
</feed>
