<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/hisilicon/Kconfig, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/hisilicon/Kconfig?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/hisilicon/Kconfig?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-07-27T00:23:40Z</updated>
<entry>
<title>clk: hisilicon: hi3559a: select RESET_HISI</title>
<updated>2021-07-27T00:23:40Z</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@infradead.org</email>
</author>
<published>2021-07-17T04:31:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=953a92f0e55f370ec76e7f85e332906f1e898ef4'/>
<id>urn:sha1:953a92f0e55f370ec76e7f85e332906f1e898ef4</id>
<content type='text'>
The clk-hi3559a driver uses functions from reset.c so it should
select RESET_HISI to avoid build errors.

Fixes these build errors:
aarch64-linux-ld: drivers/clk/hisilicon/clk-hi3559a.o: in function `hi3559av100_crg_remove':
clk-hi3559a.c:(.text+0x158): undefined reference to `hisi_reset_exit'
aarch64-linux-ld: drivers/clk/hisilicon/clk-hi3559a.o: in function `hi3559av100_crg_probe':
clk-hi3559a.c:(.text+0x1f4): undefined reference to `hisi_reset_init'
aarch64-linux-ld: clk-hi3559a.c:(.text+0x238): undefined reference to `hisi_reset_exit'

Fixes: 6c81966107dc ("clk: hisilicon: Add clock driver for hi3559A SoC")
Signed-off-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Cc: Dongjiu Geng &lt;gengdongjiu@huawei.com&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: stable@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: https://lore.kernel.org/r/20210717043159.12566-1-rdunlap@infradead.org
Reviewed-by: Dongjiu Geng &lt;gengdongjiu1@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: Add clock driver for hi3559A SoC</title>
<updated>2021-06-28T03:14:24Z</updated>
<author>
<name>Dongjiu Geng</name>
<email>gengdongjiu@huawei.com</email>
</author>
<published>2021-03-23T11:29:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6c81966107dc0caa5d2ebedbcebb5f10d865064d'/>
<id>urn:sha1:6c81966107dc0caa5d2ebedbcebb5f10d865064d</id>
<content type='text'>
Add clock drivers for hi3559A SoC, this driver
controls the SoC registers to supply different
clocks to different IPs in the SoC.

Signed-off-by: Dongjiu Geng &lt;gengdongjiu@huawei.com&gt;
Link: https://lore.kernel.org/r/1616498973-47067-3-git-send-email-gengdongjiu1@gmail.com
[sboyd@kernel.org: Mark arrays static, add __iomem, drop unused array,
avoid kfree of devm memory]
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: Add clock driver for Hi3670 SoC</title>
<updated>2018-10-16T21:47:16Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2018-09-21T06:01:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c1a3308a0629f6467994959aa617c2a31038befa'/>
<id>urn:sha1:c1a3308a0629f6467994959aa617c2a31038befa</id>
<content type='text'>
Add clock driver for HiSilicon Hi3670 SoC utilizing HiSilicon's
common clk code.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUB</title>
<updated>2018-06-01T19:45:43Z</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2018-05-22T20:45:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7b873e4b5a9358f9da3f101da8273314dd6e27e1'/>
<id>urn:sha1:7b873e4b5a9358f9da3f101da8273314dd6e27e1</id>
<content type='text'>
The current defconfig is inconsistent as it selects the mailbox and
the clock for the hi6220 and the hi3660 without having their Kconfigs
making sure the dependencies are correct. It ends up when selecting
different versions for the kernel (for example when git bisecting)
those options disappear and they don't get back, leading to unexpected
behaviors. In our case, the cpufreq driver does no longer work because
the clock fails to initialize due to the clock stub and the mailbox
missing.

In order to have the dependencies correctly set when defaulting, let's
do the same as commit 3a49afb84ca074e ("clk: enable hi655x common clk
automatically") where we select automatically the driver when the
parent driver is selected. With sensible defaults in place, we can leave
other choices for EXPERT.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Leo Yan &lt;leo.yan@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: Add support for Hi3660 stub clocks</title>
<updated>2017-12-07T07:01:46Z</updated>
<author>
<name>Kaihua Zhong</name>
<email>zhongkaihua@huawei.com</email>
</author>
<published>2017-11-17T09:27:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4f16f7ff3bc02f6e1845677235fea157bdc0e59c'/>
<id>urn:sha1:4f16f7ff3bc02f6e1845677235fea157bdc0e59c</id>
<content type='text'>
Hi3660 has four stub clocks, which are big and LITTLE cluster clocks,
GPU clock and DDR clock.  These clocks ask MCU for frequency scaling
by sending message through mailbox.

This commit adds support for stub clocks, it requests the dedicated
mailbox channel at initialization; then later uses this channel to send
message to MCU to execute frequency scaling. The four stub clocks share
the same mailbox channel, but every stub clock has its own command id so
MCU can distinguish the requirement coming for which clock.

A shared memory is used to present effective frequency value, so the
clock driver uses I/O mapping for the memory and reads back rate value.

Reviewed-by: Leo Yan &lt;leo.yan@linaro.org&gt;
Signed-off-by: Kai Zhao &lt;zhaokai1@hisilicon.com&gt;
Signed-off-by: Tao Wang &lt;kevin.wangtao@hisilicon.com&gt;
Signed-off-by: Ruyi Wang &lt;wangruyi@huawei.com&gt;
Signed-off-by: Kaihua Zhong &lt;zhongkaihua@huawei.com&gt;
[sboyd: Fix possible out of bounds access in hi3660_stub_clk_hw_get(),
        use devm_of_clk_add_hw_provider(), devm_ioremap() returns
	NULL not error pointers]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: Add clock driver for hi3660 SoC</title>
<updated>2017-01-10T00:20:38Z</updated>
<author>
<name>Zhangfei Gao</name>
<email>zhangfei.gao@linaro.org</email>
</author>
<published>2016-12-29T02:33:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d374e6fd50880c949cdfa649f6f0c7ed2321f896'/>
<id>urn:sha1:d374e6fd50880c949cdfa649f6f0c7ed2321f896</id>
<content type='text'>
Add clock drivers for hi3660 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.

Signed-off-by: Zhangfei Gao &lt;zhangfei.gao@linaro.org&gt;
[sboyd@codeaurora.org: Simplify probe with function pointer]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: Hi6220: enable stub clock driver for ARCH_HISI</title>
<updated>2016-11-15T02:40:47Z</updated>
<author>
<name>Leo Yan</name>
<email>leo.yan@linaro.org</email>
</author>
<published>2016-08-31T08:50:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9a881bc55d7b2cb4093005391613a2c517f09516'/>
<id>urn:sha1:9a881bc55d7b2cb4093005391613a2c517f09516</id>
<content type='text'>
In current kernel config 'CONFIG_STUB_CLK_HI6220' is disabled by
default, as result stub clock driver has not been registered and
CPUFreq driver cannot work.

This patch is to enable stub clock driver in config for ARCH_HISI.

Reported-by: Dietmar Eggemann &lt;dietmar.eggemann@arm.com&gt;
Signed-off-by: Leo Yan &lt;leo.yan@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: add CRG driver for Hi3516CV300 SoC</title>
<updated>2016-11-14T20:04:39Z</updated>
<author>
<name>Pan Wen</name>
<email>wenpan@hisilicon.com</email>
</author>
<published>2016-11-14T02:49:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c80dfd9bf54e178207b7bd124b0dd5e2453b87fe'/>
<id>urn:sha1:c80dfd9bf54e178207b7bd124b0dd5e2453b87fe</id>
<content type='text'>
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Pan Wen &lt;wenpan@hisilicon.com&gt;
Signed-off-by: Jiancheng Xue &lt;xuejiancheng@hisilicon.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: hisilicon: add CRG driver for Hi3798CV200 SoC</title>
<updated>2016-11-11T23:43:49Z</updated>
<author>
<name>Jiancheng Xue</name>
<email>xuejiancheng@hisilicon.com</email>
</author>
<published>2016-10-29T06:13:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=707d33cb0b731472b7564d9fad8d45cbbd7fece3'/>
<id>urn:sha1:707d33cb0b731472b7564d9fad8d45cbbd7fece3</id>
<content type='text'>
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Jiancheng Xue &lt;xuejiancheng@hisilicon.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
</feed>
