linux-dev/drivers/clk/imx/Makefile, branch master

clk: imx: add i.MX93 clk gate

2022-09-19T10:06:45Z

i.MX93 LPCG is different from i.MX8M CCGR. Although imx_clk_hw_gate4_flags is used here, it not strictly match i.MX93. i.MX93 has such design: - LPCG_DIRECT use BIT0 as on/off gate when LPCG_AUTHEN CPU_LPM is 0 - LPCG_LPM_CUR use BIT[2:0] as on/off gate when LPCG_AUTHEN CPU_LPM is 1 The current implementation suppose CPU_LPM is 0, and use LPCG_DIRECT BIT[1:0] as on/off gate. Although BIT1 is touched, actually BIT1 is reserved. And imx_clk_hw_gate4_flags use mask 0x3 to determine whether the clk is enabled or not, but i.MX93 LPCG only use BIT0 to control when CPU_LPM is 0. So clk disabled unused during kernel boot not able to gate off the unused clocks. To match i.MX93 LPCG, introduce imx93_clk_gate. Signed-off-by: Peng Fan Reviewed-by: Ye Li Reviewed-by: Jacky Bai Reviewed-by: Abel Vesa Signed-off-by: Abel Vesa Link: https://lore.kernel.org/r/20220830033137.4149542-6-peng.fan@oss.nxp.com

clk: imx: add i.MX93 clk

2022-03-04T15:06:29Z

Add i.MX93 clk driver. i.MX93 clk hardware design is different compared with i.MX8M. It supports 4 sources for each clk root and the sources are separated into a few groups, low speed/fast io/audio and etc. Reviewed-by: Abel Vesa Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20220228020908.2810346-6-peng.fan@oss.nxp.com [abel.vesa@nxp.com: Added missing module license and description] Signed-off-by: Abel Vesa

clk: imx: support fracn gppll

2022-03-04T15:06:29Z

This PLL module is a Fractional-N synthesizer, supporting 30-bit numerator and denominator. Numerator is a signed number. It has feature to adjust fractional portion of feedback divider dynamically. This fracn gppll is used in i.MX93. Reviewed-by: Abel Vesa Reviewed-by: Sascha Hauer Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20220228020908.2810346-5-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa

clk: imx: add i.MX93 composite clk

2022-03-04T15:06:29Z

i.MX93 CCM ROOT clock has a mux, gate and divider in one register, here is to combine all these into one composite clk and simplify clk tree. i.MX93 CCM is a new IP compared with i.MX8M, so introduce a new file. Reviewed-by: Abel Vesa Reviewed-by: Stephen Boyd Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20220228020908.2810346-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa

clk: imx: Add imx8dxl clk driver

2022-01-29T13:12:07Z

Add files for imx8dxl clk driver which is based on imx8qxp clock driver. Signed-off-by: Jacky Bai Signed-off-by: Abel Vesa Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/1639747533-9778-1-git-send-email-abel.vesa@nxp.com

clk: imx: Add initial support for i.MXRT1050 clock driver

2022-01-29T13:12:06Z

Add clock driver support for i.MXRT1050. Signed-off-by: Jesse Taube Suggested-by: Giulio Benetti Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20220111215415.2075257-6-Mr.Bossman075@gmail.com Signed-off-by: Abel Vesa

clk: imx: Add clock driver for imx8ulp

2021-09-30T13:22:56Z

Add clock driver for i.MX8ULP. Signed-off-by: Peng Fan Signed-off-by: Jacky Bai Reviewed-by: Abel Vesa Link: https://lore.kernel.org/r/20210914065208.3582128-9-ping.bai@nxp.com Signed-off-by: Abel Vesa

clk: imx8qm: add clock valid resource checking

2021-06-14T09:33:22Z

Add imx8qm clock valid resource checking mechanism Signed-off-by: Dong Aisheng Reviewed-by: Abel Vesa Signed-off-by: Abel Vesa

clk: imx8qxp: add clock valid checking mechnism

2021-06-14T09:33:19Z

clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng Reviewed-by: Abel Vesa Signed-off-by: Abel Vesa

clk: imx: imx21: Remove clock driver

2020-09-22T06:09:19Z

As i.MX21 support has been removed, get rid of its clock driver too. Signed-off-by: Fabio Estevam Acked-by: Arnd Bergmann Signed-off-by: Shawn Guo