linux-dev/drivers/clk/mediatek/Kconfig, branch master

clk: mediatek: add driver for MT8365 SoC

2022-09-30T22:08:16Z

Add clock drivers for MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann Link: https://lore.kernel.org/r/20220822152652.3499972-5-msp@baylibre.com Reported-by: kernel test robot Signed-off-by: Stephen Boyd

clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

2022-09-26T03:13:09Z

Add the clock drivers for the entire clock tree of MediaTek Helio X10 MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen) and multimedia clocks (mmsys, mfg, vdecsys, vencsys). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai

clk: mediatek: Add MT8186 mcusys clock support

2022-04-25T23:59:39Z

Add MT8186 mcusys clock controller which provides muxes to select the clock source of APMCU. Signed-off-by: Chun-Jie Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen Link: https://lore.kernel.org/r/20220409132251.31725-3-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: add mt7986 clock support

2022-01-07T02:37:55Z

Add MT7986 clock support, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks. Signed-off-by: Sam Shih Link: https://lore.kernel.org/r/20211217121148.6753-4-sam.shih@mediatek.com Reviewed-by: Ryder Lee [sboyd@kernel.org: Fix typos in Kconfig, there are more existing typos from where they were copied from of but whatever] Signed-off-by: Stephen Boyd

clk: mediatek: support COMMON_CLK_MT6779 module build

2021-09-15T01:20:21Z

To support COMMON_CLK_MT6779* module build, add MODULE_LICENSE and export necessary symbols. Cc: Stephen Boyd Cc: Hanks Chen Cc: Wendell Lin Cc: Lee Jones Signed-off-by: Miles Chen Link: https://lore.kernel.org/r/20210901222526.31065-4-miles.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: support COMMON_CLK_MEDIATEK module build

2021-09-15T01:20:20Z

To support COMMON_CLK_MEDIATEK module build, add MODULE_LICENSE and export necessary symbols. Cc: Stephen Boyd Cc: Hanks Chen Cc: Wendell Lin Cc: Lee Jones Signed-off-by: Miles Chen Link: https://lore.kernel.org/r/20210901222526.31065-3-miles.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8195 apmixedsys clock support

2021-09-14T22:05:37Z

Add MT8195 apmixedsys clock controller which provides Plls generated from SoC 26m and ssusb clock gate control. Signed-off-by: Chun-Jie Chen Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20210914021633.26377-7-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167

2021-07-27T18:46:27Z

I found that COMMON_CLK_MT8167* do not depend on COMMON_CLK_MT8167, so it is possible to config: CONFIG_COMMON_CLK_MT8167=n CONFIG_COMMON_CLK_MT8167_*=y Although it does not cause build breaks with such configuration, I think it is clearer to make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167. Signed-off-by: Miles Chen Link: https://lore.kernel.org/r/20210716051732.3422-1-miles.chen@mediatek.com Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8192 vencsys clock support

2021-07-27T17:53:10Z

Add MT8192 vencsys clock provider Signed-off-by: Weiyi Lu Signed-off-by: Chun-Jie Chen Link: https://lore.kernel.org/r/20210726105719.15793-22-chun-jie.chen@mediatek.com Reviewed-by: Ikjoon Jang Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8192 vdecsys clock support

2021-07-27T17:53:10Z

Add MT8192 vdecsys and vdecsys soc clock providers Signed-off-by: Weiyi Lu Signed-off-by: Chun-Jie Chen Link: https://lore.kernel.org/r/20210726105719.15793-21-chun-jie.chen@mediatek.com Reviewed-by: Ikjoon Jang Signed-off-by: Stephen Boyd