<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/meson/Kconfig, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/meson/Kconfig?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/meson/Kconfig?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2020-11-23T08:08:23Z</updated>
<entry>
<title>clk: meson: enable building as modules</title>
<updated>2020-11-23T08:08:23Z</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@baylibre.com</email>
</author>
<published>2020-11-18T19:14:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=20425f6319480e84f48261fc7c0e4ce61a6d333e'/>
<id>urn:sha1:20425f6319480e84f48261fc7c0e4ce61a6d333e</id>
<content type='text'>
Make it possible to build all clk drivers as modules, but default
remains built-in.

No functional changes.

Signed-off-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/20201118191405.36798-1-khilman@baylibre.com
</content>
</entry>
<entry>
<title>clk: meson: Kconfig: fix dependency for G12A</title>
<updated>2020-11-23T08:08:22Z</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@baylibre.com</email>
</author>
<published>2020-11-18T19:09:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bae69bfa3a586493469078ec4ca35499b754ba5c'/>
<id>urn:sha1:bae69bfa3a586493469078ec4ca35499b754ba5c</id>
<content type='text'>
When building only G12A, ensure that VID_PLL_DIV clock driver is
selected, otherwise results in this build error:

ERROR: modpost: "meson_vid_pll_div_ro_ops" [drivers/clk/meson/g12a.ko] undefined!

Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Link: https://lore.kernel.org/r/20201118190930.34352-1-khilman@baylibre.com
</content>
</entry>
<entry>
<title>clk: meson: make shipped controller configurable</title>
<updated>2020-09-10T09:47:33Z</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2020-08-28T15:47:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7b5c5720a3689c2c16968ee276b7c47edb64ce0f'/>
<id>urn:sha1:7b5c5720a3689c2c16968ee276b7c47edb64ce0f</id>
<content type='text'>
Add the necessary bits so unnecessary amlogic clock controllers can be
compiled out. This allows to save a few kB when necessary.

Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/20200828154735.435374-1-jbrunet@baylibre.com
</content>
</entry>
<entry>
<title>clk: meson: add g12a cpu dynamic divider driver</title>
<updated>2019-08-09T10:10:03Z</updated>
<author>
<name>Neil Armstrong</name>
<email>narmstrong@baylibre.com</email>
</author>
<published>2019-07-31T08:40:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=26d34431add04a98a60b8935c25765914fa773f7'/>
<id>urn:sha1:26d34431add04a98a60b8935c25765914fa773f7</id>
<content type='text'>
Add a clock driver for the cpu dynamic divider, this divider needs
to have a flag set before setting the divider value then removed
while writing the new value to the register.

This drivers implements this behavior and will be used essentially
on the Amlogic G12A and G12B SoCs for cpu clock trees.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Reviewed-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: meson: remove clk input helper</title>
<updated>2019-07-29T10:42:49Z</updated>
<author>
<name>Alexandre Mergnat</name>
<email>amergnat@baylibre.com</email>
</author>
<published>2019-07-25T16:42:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e96c7612315a1183e12d5b6ebd523a3a93617510'/>
<id>urn:sha1:e96c7612315a1183e12d5b6ebd523a3a93617510</id>
<content type='text'>
The clk input function which allows clock controllers to register a bypass
clock from a clock producer is no longer needed anymore since meson clock
controllers have migrated to a new parent allocation method.

Signed-off-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: meson: remove ee input bypass clocks</title>
<updated>2019-07-29T10:42:49Z</updated>
<author>
<name>Alexandre Mergnat</name>
<email>amergnat@baylibre.com</email>
</author>
<published>2019-07-25T16:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b11cfaba5b4d6e287540a3d64c403e5b26dd2728'/>
<id>urn:sha1:b11cfaba5b4d6e287540a3d64c403e5b26dd2728</id>
<content type='text'>
During probe, bypass clocks (i.e. ee-in-xtal) are made from device-tree
inputs to provide input clocks which can be access through global name.
The cons of this method are the duplicated clocks, means more string
comparison.

Specify parent directly with device-tree clock name.

Remove the bypass clock registration from the ee probe function.

Signed-off-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: meson: remove ao input bypass clocks</title>
<updated>2019-07-29T10:42:48Z</updated>
<author>
<name>Alexandre Mergnat</name>
<email>amergnat@baylibre.com</email>
</author>
<published>2019-07-25T16:41:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=072a043f5a2e02441002fff34e3885e6026714eb'/>
<id>urn:sha1:072a043f5a2e02441002fff34e3885e6026714eb</id>
<content type='text'>
During probe, bypass clocks (i.e. ao-in-xtal) are made from device-tree
inputs to provide input clocks which can be access through global name.
The cons of this method are the duplicated clocks, means more string
comparison.

Specify parent directly with device-tree clock name.

Function to regiter bypass clocks is removed.

Input parameters from meson aoclk data structure are deprecated and then
deleted since all aoclk files are migrated.

Signed-off-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: meson: axg-audio: migrate to the new parent description method</title>
<updated>2019-07-29T10:42:48Z</updated>
<author>
<name>Alexandre Mergnat</name>
<email>amergnat@baylibre.com</email>
</author>
<published>2019-07-25T16:40:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=282420eed23f237963f2033b2f2bedb90fbcc5e1'/>
<id>urn:sha1:282420eed23f237963f2033b2f2bedb90fbcc5e1</id>
<content type='text'>
This clock controller use the string comparison method to describe parent
relation between the clocks, which is not optimized. A recent patch [0]
allows parents to be specified without string names or with device-tree
clock name by using a new assignment structure.

Migrate to the new way by using .parent_hws where possible (when parent
clocks are localy declared in the controller) and use .parent_data
otherwise.

Remove clk input helper and all bypass clocks (declared in probe function)
which are no longer used since we are able to use device-tree clock name
directly.

[0] commit fc0c209c147f ("clk: Allow parents to be specified without string names")

Signed-off-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
[jbrunet@baylibre.com: remove CLK_SET_RATE_PARENT from mst muxes]
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clk: meson: Add G12A AO Clock + Reset Controller</title>
<updated>2019-02-13T08:49:32Z</updated>
<author>
<name>Neil Armstrong</name>
<email>narmstrong@baylibre.com</email>
</author>
<published>2019-02-12T16:28:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=042f01bb7f80012e19369b7f8a52fc5b74f4856b'/>
<id>urn:sha1:042f01bb7f80012e19369b7f8a52fc5b74f4856b</id>
<content type='text'>
Add the Amlogic G12A AO Clock and Reset controller driver handling
generation of Always-On clocks :
- AO Clocks and Reset for Always-On modules
- 32K Generation for USB and CEC
- SAR ADC controller clock

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Acked-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Link: https://lkml.kernel.org/r/20190212162859.20743-3-narmstrong@baylibre.com
</content>
</entry>
</feed>
